-
DecimationFilterDesignforDDCandImplementingItwithF
本文介绍了在数字下变频(DDC) 中的抽取滤波器系统设计方法和具体实现方案。采用CIC 滤波器、HB
滤波器、FIR 滤波器三级级联的方式来降低采样率。通过实际验证,证明了设计的可行性(This article describes the digital down conversion (DDC) of the decimation filter system design methods and concrete realization of the program. Using CIC filter, HB filter, FIR filter cascade three-level approach to reduce the sampling rate. Through the actual authentication, to prove the feasibility of the design)
- 2008-04-14 11:02:00下载
- 积分:1
-
velocity_Verilog
速度表(velocity)要求:1.显示汽车Km/h数;2.车轮每转一圈,有一传感脉冲;每个脉冲代表1m的距离;3.采样周期设为10s;
4.要求显示到小数点后边两位;5.用数码管显示;6. 最高时速小于300Km/h。(约为83.3m/s)
(use verilog to realize velocity)
- 2020-07-13 15:08:51下载
- 积分:1
-
802.11a的基带检测
802.11a的基带分组检测的verilog实现,其使用了分组检测的优化算法——延时相关保存算法,具有由于的检测性能。
- 2022-03-26 03:59:22下载
- 积分:1
-
AD9777_SPI_CONFIG
verilog ad9777 ad芯片的配置程序,SPI接口协议 16bit DA(Verilog ad9777 AD chip configuration program, SPI interface protocols for 16 bit DA)
- 2020-07-29 21:08:38下载
- 积分:1
-
fifo
fifo是大多数设计中非常重要的模块;
- 2022-02-27 06:51:03下载
- 积分:1
-
DE2_115_SD_Card_Audio_Player
该代码实现了对SD 卡的读写操作,是一个较好的范例。(The code achieves access reading SD CARD based on DE-2,It is
a good example。)
- 2012-08-14 00:29:47下载
- 积分:1
-
8_sys_clock
黑金开发板对时钟信号的编写实验以及调试,相关代码如压缩包所示(CLOCK FPGA)
- 2012-09-18 22:51:36下载
- 积分:1
-
GPS
通过UART在FPGA数码管上显示经纬度坐标的代码(By UART displayed on FPGA digital latitude and longitude coordinates of the code)
- 2015-06-22 17:14:37下载
- 积分:1
-
ad9226test
使用CycloneIV芯片,实现对高精度ADCad9226的数据采集。内有详细代码说明,并附有调试结果(Use CycloneIV, to achieve high-precision data acquisition ADCad9226. Along with debugging results)
- 2014-08-15 16:18:33下载
- 积分:1
-
NIOS_i2sound_demo
在nios系统开发中的驱动i2c音频电路的代码,包括verilog代码,与相应的驱动代码(In the nios system development in the driver i2c code for the audio circuitry, including the verilog code, and the corresponding driver code)
- 2009-12-18 10:08:09下载
- 积分:1