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鸟哥的Linux私房菜——基础学习篇（第四版）
全面了解Linux系统，构建服务器，用Vim写写程序(Fully understand the Linux system, build the server, write programs with Vim.)
- 2018-11-02 10:56:59下载
- 积分：1
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S04_基于ZYNQ的HLS 图像算法设计基础
说明： VIVADO HLS IMAGE 使用文档(vivado image processing example text of zynq)
- 2020-06-17 11:40:02下载
- 积分：1
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1553B的编解码程序是有用的给大家分享分享
1553B的编解码程序很好用给大家分享 -the series 1553B decoder procedure is useful for everyone to share share
- 2022-07-28 09:59:52下载
- 积分：1
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程序采用VHDL：频率合成DDS主要调用LPM，
程序用VHDL实现：
频率合成，DDS
主要调用LPM-procedures using VHDL : frequency synthesis, DDS major call LPM
- 2023-07-07 03:20:03下载
- 积分：1
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Continuous_delay_control_Farrow
matlab代码，利用Farrow结构设计分数延时滤波器，滤波器阶数和个数可分别进行设置，利用最大最小准则近似(Matlab code, using Farrow structure design fractional delay filter, filter order and number can be set separately, using the maximum and minimum criterion approximation.)
- 2019-06-14 09:10:59下载
- 积分：1
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rs_encoder
RS编码器的fpga实现，有TESTBench(RS encoder to achieve the fpga, and TESTBench)
- 2009-06-24 11:37:04下载
- 积分：1
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组合电路的设计8位加法器设计(ADD8.vhd)
组合电路的设计8位加法器设计(ADD8.vhd)-Combinational Circuit Design 8-bit adder design (ADD8.vhd)
- 2022-10-25 12:35:04下载
- 积分：1
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demo6-beep
说明： demo6 蜂鸣器实验
蜂鸣器演奏音乐(demo6 buzzer buzzer experiment playing music)
- 2020-12-27 22:59:02下载
- 积分：1
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SPI 主
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- 2023-02-06 00:45:03下载
- 积分：1
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通用：我新的FFT VHDL VHDL，我试图用Xilinx的FFT核，但当…
FFT vhdl generic: I m new to vhdl, and I tried to use xilinx fft core, but when I try to simulate it in test bench using ise simulator, I get zero results.
here is what I do:
1- from core generator I choose fft core and create .vhd & .vho & .xco files.
2- I add the .xco & .vhd files to my project.
3- I create a new vhdl source as a wrapper to the core and add the code from the .vho files where it exactly says, and take the ports of the component and add it to the entity of the wrapper file.-FFT vhdl generic: I m new to vhdl, and I tried to use xilinx fft core, but when I try to simulate it in test bench using ise simulator, I get zero results.
here is what I do:
1- from core generator I choose fft core and create .vhd & .vho & .xco files.
2- I add the .xco & .vhd files to my project.
3- I create a new vhdl source as a wrapper to the core and add the code from the .vho files where it exactly says, and take the ports of the component and add it to the entity o
- 2022-06-20 20:06:05下载
- 积分：1
