-
SRAM6bit
sram 6bit仿真模型,verilog编写(sram 6bit simulation model, verilog prepared)
- 2021-03-16 13:59:22下载
- 积分:1
-
这些是Verilog文件但我上传文本格式(记事本)
these are verilog files but i am uploading in text(notepad) format
- 2022-12-19 09:00:04下载
- 积分:1
-
Roy dsd
basic verilog code on siso, piso, sipo
- 2020-06-25 18:40:01下载
- 积分:1
-
niossram
altera fpga ep3c25器件微处理器开发,niosii+sram, 已编译通过,可直接下载到开发板(altera fpga ep3c25 the development of microprocessor devices, niosii+ sram, compiled through, can be directly downloaded to the development board)
- 2009-04-13 13:26:42下载
- 积分:1
-
signal
能产生正弦波、三角波、方波和e指数衰减的扫频波,且相关参数可调(Can produce sine wave, triangle wave, square wave, and e exponential decay wave sweep and adjustable parameters)
- 2014-05-13 15:15:12下载
- 积分:1
-
LED7s
七段LED数码管显示译码器设计,将输入的16位二进制数据分别输出到4个数码管上(Seven-segment LED display decoder design, the input of 16 binary data are output to the four digital tube)
- 2021-04-23 23:28:47下载
- 积分:1
-
function_automatic
Verilog使用automatic function的範例(Verilog example of the use of the automatic function)
- 2009-06-18 12:01:30下载
- 积分:1
-
VHDL教学的经典之作,大家学习必看的书籍。
VHDL教学的经典之作,大家学习必看的书籍。-VHDL teaching classic, must-see U.S. study books.
- 2022-12-05 21:15:06下载
- 积分:1
-
altera推出的基于它们fpga和cpld的构建嵌入式系统的新技术sopc的介绍。其集成在quartus II中...
altera推出的基于它们fpga和cpld的构建嵌入式系统的新技术sopc的介绍。其集成在quartus II中-ALTERA due to launch them and they simply cpld Construction of the new Embedded System Technology sopc briefing. Its integrated into the Quartus II
- 2022-12-14 08:55:03下载
- 积分:1
-
用VHDL写的计算器,实现加减功能以及VGA显示功能,适合VHDL初学者使用。...
用VHDL写的计算器,实现加减功能以及VGA显示功能,适合VHDL初学者使用。-VHDL write calculators, Modified functions and achieve VGA display, VHDL for beginners.
- 2022-06-12 21:10:47下载
- 积分:1