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ROM建立平方电路
A ROM to build a squaring circuit
- 2022-08-07 16:45:22下载
- 积分：1
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16 floating
16卫浮点FFT算法的VHDL实现，有测试文件。-16 floating-point FFT algorithm Wei VHDL realize, have the test paper.
- 2023-03-07 14:45:03下载
- 积分：1
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DecimationFilterDesignforDDCandImplementingItwithF
本文介绍了在数字下变频(DDC) 中的抽取滤波器系统设计方法和具体实现方案。采用CIC 滤波器、HB
滤波器、FIR 滤波器三级级联的方式来降低采样率。通过实际验证,证明了设计的可行性(This article describes the digital down conversion (DDC) of the decimation filter system design methods and concrete realization of the program. Using CIC filter, HB filter, FIR filter cascade three-level approach to reduce the sampling rate. Through the actual authentication, to prove the feasibility of the design)
- 2008-04-14 11:02:00下载
- 积分：1
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VhdlGoldenReferenceGuide
Vhdl Golden Reference Guide.pdf
- 2021-04-23 10:18:48下载
- 积分：1
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DongHo
design a clock using KIT DE1
- 2014-09-19 04:46:23下载
- 积分：1
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ComunicationRealizationBetweenFPGAandSerialInterfa
说明： 杜晓斌和陈兴文-FPGA和单片机串行通信接口的实现一文提出了FPGA与单片机实现数据串行通信的解决方案。在通信过程中完全遵守RS232 协议，给出了发送模块的vhdl源代码。
(杜晓斌and陈兴文-FPGA single-chip serial communication interface and the realization of a text proposed by the FPGA and MCU serial data communications solutions. In the communication process in full compliance with the RS232 protocol is given to send the VHDL source code modules.)
- 2008-11-18 15:41:34下载
- 积分：1
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verilog-2-1-4
卷积码（2,1,4）编解码的FPGA实现(Convolution code (2,1,4) decoding the FPGA implementation)
- 2020-12-27 21:09:02下载
- 积分：1
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GPS
在fpga中对GPS信息采集程序。具有很好的参考性(In the fpga in the GPS information collection procedures. Has a very good reference)
- 2011-11-17 13:49:20下载
- 积分：1
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74-Hamming-code-encoder-and-decoder
基于VHDL实现（7，4）汉明码的编码器和译码器(VHDL-based implementation (7,4) Hamming code encoder and decoder)
- 2011-06-09 20:47:07下载
- 积分：1
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用于FPGA的变长编码算法的HDL编码，包括VHDL及Verilog代码。可用于JPEG及MPEG压缩算法。...
用于FPGA的变长编码算法的HDL编码，包括VHDL及Verilog代码。可用于JPEG及MPEG压缩算法。-Variable-length encoding for FPGA HDL coding algorithms, including VHDL and Verilog code. Can be used in JPEG and MPEG compression algorithms.
- 2022-02-13 17:47:49下载
- 积分：1
