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FPGA DDS
说明： 使用DE2实现DDS，步骤简单，配置管脚可自查看(Using DE2 to realize DDS, the steps are simple and the pins can be self-checked.)
- 2020-06-23 10:00:01下载
- 积分：1
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FPGA
基于FPGA的图像采集卡的设计与相关说明-FPGA-based design of frame grabbers and related note
- 2023-06-09 09:00:04下载
- 积分：1
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miaob
电子秒表，FPGA实现,本科某课程设计，程序注释非常详细，(FPGA TIME-COUNTING)
- 2010-05-10 11:25:55下载
- 积分：1
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fpga_security
The use of FPGAs for cryptographic applications is highly attractive for a variety of reasons but at the same time there are many open issues related to the general security of FPGAs. This contribution attempts to provide a state-of-the-art description of this topic. First, the advantages of reconfigurable hardware for cryptographic applications are discussed from a systems perspective. Second, potential security problems of FPGAs are described in detail, followed by a proposal of a some countermeasure. Third, a list of open research problems is provided. Even though there have been many contributions dealing with the algorithmic
aspects of cryptographic schemes implemented on FPGAs, this contribution appears to be the first comprehensive treatment of system and security aspects.
- 2009-05-15 07:09:06下载
- 积分：1
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SD_W_R
SD卡读写源代码.用Verilog编写.很不错.值得借鉴.特别对SD卡开发的人员!(SD card reader-writer source code. Prepared to use Verilog. Is pretty good. Be used for reference. In particular, the development of personnel SD card!)
- 2020-12-27 22:09:03下载
- 积分：1
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A complete signal test procedures, the various indicators of signal integrity te...
一个完整的信号测试程序,对信号的各项指标进行完整的测试,并分析-A complete signal test procedures, the various indicators of signal integrity testing, and analysis of
- 2022-03-23 02:41:40下载
- 积分：1
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ed2_prac5_conta_finfin
program in hdl that this open mind in digital resources
- 2009-06-27 08:08:08下载
- 积分：1
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DAC_sinewave_timer_int
8051 1Khz sine wave generator. make use of DAC0808 and timer 0 interrupt. Also single led is blinked continuously.
- 2011-12-12 13:19:08下载
- 积分：1
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ahb_master_latest.tar
AHB master总线verilog实现(Implementation of AHB master bus Verilog)
- 2020-07-01 22:20:02下载
- 积分：1
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华勒斯树结构的8位修正展位乘数
应用背景Booth乘法器实现快速乘法algorithm.mainly用于通信和DSP组成的3块摊位重新编码，华勒斯树和超前进位addder关键技术超大规模集成电路设计，通信和DSP的应用，芯片设计，VHDL，Verilog程序，加法器和乘法器
- 2022-02-04 19:57:10下载
- 积分：1
