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用VHDL实现的DDS逻辑,大家可以参考下
用VHDL实现的DDS逻辑,大家可以参考下-DDS achieved using VHDL logic, we can refer to the following
- 2022-08-10 09:43:58下载
- 积分:1
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固定的点复杂 FFT
固定的 128 点复杂 FFT
或
64/8/16 点
- 2022-02-06 02:51:48下载
- 积分:1
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一百多个例子很好的verilog 学习资料,大家可以多多参考,适合初学者学习...
一百多个例子很好的verilog 学习资料,大家可以多多参考,适合初学者学习-More than 100 examples of good learning materials Verilog, you can a lot of reference, suitable for beginners to learn
- 2022-03-10 00:01:48下载
- 积分:1
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一个可以使用的RocketI/O开发实例。基于Xilinx FPGA Virtex5平台。
一个可以使用的RocketI/O开发实例。基于Xilinx FPGA Virtex5平台。-One can use RocketI/O development example. Based on Xilinx FPGA Virtex5 platform.
- 2022-02-12 14:18:54下载
- 积分:1
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QAM_verilog
基于FPGA的16QAM,用verilog编写,其中DDS为自己编写,含设计文件和testbench。已通过moldesim软件仿真。 (FPGA-based 16QAM, with verilog writing, including DDS for their preparation, including design files and testbench. Simulation software has been through moldesim.)
- 2021-02-22 18:29:41下载
- 积分:1
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VHDL学习总结,简要概括了VHDL,非常适合做学习的总结
VHDL学习总结,简要概括了VHDL,非常适合做学习的总结-VHDL study conclusion, a brief summary of VHDL, very suitable for learning to do a summary of
- 2022-05-29 12:42:36下载
- 积分:1
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manchester_verilog
manchester_verilog源代码(manchester_verilog source code)
- 2008-07-11 08:50:53下载
- 积分:1
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Key-200893142940130
说明: 关于地铁售票的一些功能 基于自动买票的VHDL设计程序 比较经典(Subway ticket on some of the features of the VHDL-based auto-buying classic design procedure)
- 2008-10-07 18:16:54下载
- 积分:1
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xapp888
说明: xilinx fpga各版本mmcm/pll动态配置RTL代码,包括testbench(xilinx fpga mmcm/pll drp RTL code, including testbench)
- 2021-01-21 21:38:46下载
- 积分:1
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blif2vhdl格式转换工具
A BLIF to VHDL converter (51K compressed tar, with SunOS, Solaris, and Linux binaries. Source code (C++) included).
- 2023-06-13 19:10:02下载
- 积分:1