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proj-ASC
simple microprocessor that gives the greatest common divisor of 2 (4bit) numbers
- 2014-11-05 06:32:53下载
- 积分:1
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Lab15_sw2reg
开关数据加载到寄存器并显示的设计与实现.3. 设计一个可以把4个开关的内容存储到一个4位寄存器的电路,并在最右边的7段显示管上显示这个寄存器中的十六进制数字。我们使用到去抖动模块clock_pulse, 用btn[0]作为输入;8位寄存器模块,用btn[1]作为加载信号;7段显示管上的显示模块x7segbc;分频模块clkdiv,用以产生模块clock_pulse和x7segbc的clk190时钟信号。(Design of switching data is loaded into the register and display the.3. design and implementation of a 4 switch content storage circuit to a 4 bit register, and in the 7 section of the most on the right shows the register in the sixteen decimal digital display tube. We used to go to the jitter module clock_pulse, with btn[0] as the input 8 bit register module, as the loading signal by btn[1] 7 segment display module on the x7segbc pipe frequency module clkdiv, clk190 clock signal for generating module clock_pulse and x7segbc.)
- 2014-03-30 09:50:48下载
- 积分:1
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用vhdl来实现的数字频率合成的技术,几乎很全的,所有的都有...
用vhdl来实现的数字频率合成的技术,几乎很全的,所有的都有 -Use VHDL to realize the digital frequency synthesis technology, almost the whole of, all have
- 2022-02-04 17:07:58下载
- 积分:1
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用VHDL语言实现的图像传感器TCD132D的时序驱动代码,时序精准!
用VHDL语言实现的图像传感器TCD132D的时序驱动代码,时序精准!-VHDL language with the image sensor TCD132D realize the timing-driven code, timing accurate!
- 2022-01-26 02:25:08下载
- 积分:1
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Endat_2
Endat slave interface
- 2021-04-21 19:38:49下载
- 积分:1
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RTC
verilog编写的RTC(实时时钟)包含APB总线接口、时钟计时部分等(verilog prepared by the RTC (real time clock) contains APB bus interface, clock time some other)
- 2009-12-19 23:51:50下载
- 积分:1
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基于FPGA的数字钟
1.设计一个具有24进制计时、显示、整点报时、时间设置和闹钟功能的数字钟,要求时钟的最小分辨率时间为1s。2.多功能数字钟系统功能的具体描述如下: 计时:正常工作状态下,每日按24小时计时制计时并显示,蜂鸣器逢整点报时。 校时: 请点击左侧文件开始预览 !预览只提供20%的代码片段,完整代码需下载后查看 加载中 侵权举报
- 2022-05-23 08:48:32下载
- 积分:1
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3-8译码器地简单实现,采用QUARTUSii5.0环境编译-3-8 decoder to realize a simple, using the compiler QUARTUSii5.0 environment
- 2022-12-08 07:30:03下载
- 积分:1
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Crack_QII_13.1_Windows
采用骏龙科技这个13.1新版本破解器.对于已经用了老版本破解器的网友,请把bin和bin64下的sys_cpt.dll删除,然后把sys_cpt.dll.bak名字改成sys_cpt.dll,也就是先恢复正版,然后用这个破解器破解。注意老的license文件也要删除,改用这个新版本破解器附带的license(Cytech Technology 13.1 using the new version of this cracker. Has been used for the old version cracker users, please sys_cpt.dll bin and bin64 under Delete, and then changed the name of the sys_cpt.dll.bak sys_cpt.dll, which is first restore genuine, then use this cracker to crack. Note that the old license file should be deleted in favor of this new version of the license that came with crack)
- 2021-03-04 09:59:32下载
- 积分:1
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24秒倒计时系统(有跑马灯)
利用CPLD
24秒倒计时系统(有跑马灯)
利用CPLD-24 seconds remaining systems (5,250) using CPLD
- 2022-03-26 05:51:13下载
- 积分:1