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dpwm_8bit
数字脉冲宽度调制，将输入的数字信号转换为对应占空比的模拟波形(Digital pulse width modulation, the digital signal is converted to the corresponding input of the duty cycle of the analog waveform)
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- 积分：1
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Quartus II
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本文介绍了汉明编码与译码通过FPGA器件来实现，介绍了使用VHDL语言编程的基本算法！...
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Turbo Decoder Release 0.3
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FPGA简:讲述了FPGA的基本概念、结构、发展
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sdram_epm570_uart
基于CPLD芯片EPM570的verilog hdl串口程序(the UART verilog hdl code based on CPLD chip-- EPM570)
- 2014-06-03 20:27:45下载
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fpga_video_game-master
在开发板EGO1上实现的直升机飞行游戏，随时间的累积，速度不断加快，数码管显示积分( Helicopter game in verilog)
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用verilog写的基于cpld的出租车计费器的源码，需要的参考一下
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ds18b20_verilgo
艾米电子的verilog HDL描述的DS18B20的程序(Amy verilog HDL description of the procedures DS18B20)
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Cadence_manual_1.2.pdf
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