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DE2_CCD_detect
de2,altera fpga
- 2011-04-14 11:14:32下载
- 积分：1
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大唐电信的FPGA设计经验，内部资料，详细完整，很有参考价值...
大唐电信的FPGA设计经验，内部资料，详细完整，很有参考价值-Datang Telecom
- 2022-03-04 13:47:05下载
- 积分：1
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VHDL语言设计；功能描述：键盘扫描，不包含去抖电路
VHDL语言设计；功能描述：键盘扫描，不包含去抖电路-VHDL language design Function description: the keyboard scanning, does not contain a circuit debounced
- 2022-08-26 08:21:49下载
- 积分：1
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控制ADV212 压缩的源代码 使用xilinx edk开发环境
控制ADV212 压缩的源代码 使用xilinx edk开发环境(adv 212 controller, using xilinx edk)
- 2020-06-27 03:40:01下载
- 积分：1
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wide_cbf
宽带波束形成，设计FIR滤波器系数。带宽为500Hz--700Hz,采样率为3000Hz，对白噪声序列进行滤波，即得到有限带宽的宽带时域信号(Broadband beamforming design FIR filter coefficients. Bandwidth of 500Hz- 700Hz, sampling rate of 3000Hz, filtered white noise sequence, ie limited bandwidth broadband time domain signal)
- 2013-03-19 09:40:45下载
- 积分：1
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vhdl
vhdl状态机设计,文件简单详细易懂，可以使用在交通灯，文件配置等系统上。(vhdl state machine design, simple, detailed and easy to understand, you can use the traffic light system file configuration file.)
- 2012-09-04 15:21:53下载
- 积分：1
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异步FIFO
自己编写的同步和异步FIFO的verilog代码，验证过，有可靠性(Verilog code of my own synchronous and asynchronous FIFO, verified,and reliable.)
- 2020-07-03 07:00:02下载
- 积分：1
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this come from alter ,you can look and find it on line about USB
this come from alter ,you can look and find it on line about USB
- 2023-09-06 16:15:03下载
- 积分：1
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adc_cfg
adc器件ads62p49配置代码，已在工程中验证可用(Temperature sensor DS18B20 parses the code, has verified the ADC device configuration code, has been verified available)
- 2020-11-04 16:29:51下载
- 积分：1
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en.SPI_EEPROM_Verilog_models_V10
spi接口的eeprom模型，型号为st公司m65pxx(The eeprom model of spi interface is st company m65pxx)
- 2021-01-19 14:28:44下载
- 积分：1
