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ODBC
ODBC编程实例，使用ODBC对基于开关量数据采集卡的通信接口设计与实现。(ODBC programming examples, using ODBC for data acquisition card based digital communications interface design and implementation.)
- 2013-07-14 13:16:35下载
- 积分：1
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emifa_ram
FPGA与DSP的EMIF通信，EMIF的RAM这方面相应的程序(FPGA and DSP EMIF communication)
- 2020-12-01 15:49:26下载
- 积分：1
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PID
用Verilog HDL编写的PID程序代码，成功调试，运行良好。(The source code of PID in Verilog HDL.Simulation was successful.)
- 2012-03-09 11:18:17下载
- 积分：1
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AD9226_easy
基于赛林思FPGA芯片， 控制采集芯片AD9226的程序(FPGA control AD9226 program)
- 2020-12-06 21:09:22下载
- 积分：1
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CCMU
代码是一个复数乘法器，两个复数相乘，只用到了2个实数相乘，运算量少(Code is a complex multiplier, two complex multiplication, uses only real number multiplied by 2, operations less)
- 2011-11-04 11:56:47下载
- 积分：1
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IC设计基础
说明： 一本很经典的IC设计中文入门书籍，由任艳颖，王彬编著，翻印几百万册(A very classic introduction to Chinese in IC design book, compiled by Ren Yanying and Wang Bin, reprinted millions of copies)
- 2020-06-23 22:20:02下载
- 积分：1
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hulf
说明： 设计一个哈夫曼编码器
要求对一段数据序列进行哈夫曼编码，使得平均码长最短，输出各元素编码和编码后的数据序列。
① 组成序列的元素是[0-9]这10个数字，每个数字其对应的4位二进制数表示。比如5对应0101，9对应1001。
② 输入数据序列的长度为256。
③ 先输出每个元素的编码，然后输出数据序列对应的哈夫曼编码序列。(Designing a Huffman Encoder
Huffman coding is required for a data sequence to minimize the average code length and output the coded and coded data sequence of each element.
(1) The elements that make up the sequence are the 10 digits [0-9], and each digit is represented by its corresponding 4-bit binary number. For example, 5 corresponds to 0101, 9 corresponds to 1001.
(2) The length of the input data sequence is 256.
(3) First output the encoding of each element, and then output the Huffman encoding sequence corresponding to the data sequence.)
- 2019-06-19 21:49:58下载
- 积分：1
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85375524AGC
Matlab agc ʵ
- 2010-04-22 21:54:28下载
- 积分：1
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integer_chao_fpga
通过FPGA实现整数阶混沌系统，通过定点数的方式，全并行。(The realization of integer order chaotic systems through FPGA)
- 2021-02-20 22:49:43下载
- 积分：1
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74ls165
74ls165电路源代码verilog,已经验证。(74ls165 verilog)
- 2020-11-22 22:59:34下载
- 积分：1
