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verilog实现的积分梳状滤波器

于 2022-02-20 发布 文件大小:1.12 kB
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代码说明:

采用verilog实现的三级CIC抽取器,输入8位数据,输出26位数据,使用有限状态机用于实现下采样,包括积分器实现模块和梳状器实现模块

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