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endat_c
说明: 用于读取海德汉绝对位置编码器的位置数据。ENDAT2.1接口(Read the data from ENDAT2.1)
- 2021-04-21 18:58:49下载
- 积分:1
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FFT_FPGA_Verilog-master
xilinx ise开发环境中fft IP核调用,仿真(Xilinx ise development environment FFT IP core call, simulation)
- 2018-07-08 23:28:46下载
- 积分:1
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ZEDBOARD
ZEDBOARD的管脚分配图和约束文件,包括PCB图和xdc文件(Pin assignment of ZEDBOARD)
- 2021-03-23 21:19:15下载
- 积分:1
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exp8
浙江大学体系结构实验课代码 实现5级流水线带有停顿,旁路和控制竞争的处理。(Experimental Architecture, Zhejiang University course code with a pause 5-stage pipeline, bypassing the treatment and control of competition.)
- 2020-09-26 12:07:46下载
- 积分:1
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简易数字钟程序(基于ALTERA quartusII)
一个简易数字钟程序,可以实现24小时精确计时、整点报时、时钟矫正、时钟复位等功能
- 2022-03-20 09:54:44下载
- 积分:1
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train_controler
train controler by verilog
- 2012-09-03 16:16:23下载
- 积分:1
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multiplier.tar
用vhdl实现的booth算法乘法器,包含了multiplexer和rca adder,同时提供了一个测试文件,modelsim测试通过(Algorithm with a booth multiplier vhdl implementation, including a multiplexer and rca adder, while providing a test file, modelsim test pass)
- 2021-04-14 13:18:55下载
- 积分:1
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lcd1602_drive
用Verilog实现1602的配置及功能。正确编译与实现(Realized by Verilog 1602 configurations and functions. Compilation and implementation of the right)
- 2011-01-21 16:47:27下载
- 积分:1
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bit7_Binary_to_BCD_LED
二进制转十进制BCD码 Verilog语言 quartusII(Binary to decimal BCD code Verilog language quartusII)
- 2013-09-14 16:49:39下载
- 积分:1
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JIAOTONGDENG
用VERILOG实现 交通灯控制,且运行正确,希望有帮助(Use VERILOG implementation traffic light control, and operation right, hope to have help)
- 2014-01-05 20:38:03下载
- 积分:1