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这是用VHDL编写的译码程序,程序简单易懂
这是用VHDL编写的译码程序,程序简单易懂-VHDL prepared decoding procedures that are simple to understand
- 2022-01-25 21:28:32下载
- 积分:1
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MAX2 EPLD 的测试程序, VHDL语言编写.
MAX2 EPLD 的测试程序, VHDL语言编写.-MAX2 EPLD testing code, VHDL language.
- 2022-01-26 06:18:20下载
- 积分:1
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合众大公司XILINX_V4实验箱原理图
合众大公司XILINX_V4实验箱原理图-United XILINX_V4 large companies schematic experimental box
- 2022-12-12 08:15:03下载
- 积分:1
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数码管显示程序,可以显示当前的数值,可以动态显示和静态显示 可以选择显示方式...
数码管显示程序,可以显示当前的数值,可以动态显示和静态显示 可以选择显示方式-Digital tube display program can display the current value, you can dynamically display and static displays can choose to display
- 2022-08-24 08:48:59下载
- 积分:1
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20080931
Design approach for VHDL and FPGA Implementation of
Automotive Black Box using CAN Protocol
- 2009-10-23 00:20:47下载
- 积分:1
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frame_decode_and_encode
一个用Verilog编写的编帧、解帧及码速匹配的程序,相当经典(Verilog prepared with a series of frames, frames and solutions yards speed matching procedures, rather classic!)
- 2006-07-12 15:10:07下载
- 积分:1
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quartusandmodelsim
本文档对quartus与modelsim运用操作描述十分详细,对初学者,会有很大帮助!(Quartus and modelsim this document on the use of operations described in great detail, for beginners, there will be a great help!)
- 2010-08-30 23:51:02下载
- 积分:1
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SHA256
SHA256加密过程,非常详细,内附原码,还有文档,很可用~(SHA256 encryption process, very detailed, containing the original code, as well as documents, it is available ~)
- 2020-11-25 16:19:33下载
- 积分:1
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CPU-Verilog
简单流水线CPU,使用 verilog实现,实现一条指令的整个流程(Implementation of Simple Pipeline CPU Verilog)
- 2020-06-23 19:40:01下载
- 积分:1
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adc
采用quartus的数模转换模块,RTL电路图(DAC module, RTL circuit diagram)
- 2018-08-27 11:09:01下载
- 积分:1