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newViterbi217
基于IEEE802.11n标准,采用verilog语言设计的(2,1,7)卷积码viterbi译码器,支持1/2,2/3,3/4,5/6四种码率的译码,以测试无误(IEEE802.11n standard Verilog language design (2,1,7) convolutional code viterbi decoder support 1/2, 2/3, 3/4, 5/6 four bit rate decoding to test and correct)
- 2020-06-29 08:40:01下载
- 积分:1
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MRAM2012
STT-MRAM磁性存储器全部verilog代码和仿真验证代码,包括行为模块,读写模块和控制模块,已经经过验证完全正确(STT-MRAM magnetic memory all the code and simulation code, including behavior module, reader module and the control module, has been proven entirely correct)
- 2020-06-29 14:20:02下载
- 积分:1
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一个霹雳灯的Verilog源程序,用PWM原理实现,产生了LED灯的渐弱效果...
一个霹雳灯的Verilog源程序,用PWM原理实现,产生了LED灯的渐弱效果-a thunderbolt lights Verilog source files, using PWM principle realized, LED lights have a gradual effect of the weak
- 2023-07-28 11:50:03下载
- 积分:1
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dingshi
定时器加数码管显示源码,以及test bench测试模块源码,经modelsim仿真结果正确(Timer plus digital display source code, and test bench test module source code, by modelsim simulation results are correct)
- 2013-07-27 10:34:41下载
- 积分:1
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Giga8b10bv10
说明: altera发布的开源8b10b源代码,vhdl语言描述(altera released the source code open source 8b10b, vhdl language description)
- 2021-01-22 18:18:41下载
- 积分:1
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LCD-Driver-(LabVIEW-2009)
Lab view using FPGA traing on lcd pannel
- 2012-03-23 23:50:54下载
- 积分:1
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test-ram
design ram v8051 for project
- 2013-07-08 23:24:20下载
- 积分:1
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lab4
说明: lab report for lab 4
- 2019-04-17 21:17:08下载
- 积分:1
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Ldpc_DecodeV1
block-LDPC 译码VHDL 源代码(block-LDPC decode VHDL source)
- 2011-09-13 11:28:53下载
- 积分:1
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fft1024-verilogCODE
fft 1024点verilog代码,适用于基-4的FFT算法描述,使用quartus,modelsim,(fftpoint 1024 verilog code)
- 2020-12-19 01:59:10下载
- 积分:1