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font6x8
Fonts for LCD 162x64 (6x8)
- 2012-09-05 07:06:05下载
- 积分:1
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APB 2.0 Master
- 2022-03-12 21:40:55下载
- 积分:1
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rd1020
Synchronous DRAM (SDRAM) has become a mainstream memory of choice in embedded system memory design
due to its speed, burst access and pipeline features. For high-end applications using processors such as Motorola
MPC 8260 or Intel StrongArm, the interface to the SDRAM is supported by the processor’s built-in peripheral module.
- 2010-07-30 16:51:31下载
- 积分:1
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fir48
48阶FIR设计,采用VHDL语言描述,门级映射……(48-oders FIR design with VHDL language and gate level)
- 2021-04-14 19:38:55下载
- 积分:1
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Six-phase-Motor-Based-on-DSP
说明: 设计了六相感应电机的控还原
制平台的硬件结构及其各个组成部分,控制平台结构主要由DSP控制系统和主驱动电路系统以及检测电路系统组成。控制系统采用TI公司的TMS320F2812快速DSP控制芯片。
(This paper designs the hardware structure of the six-phase motor control system and introduces every component. The control platform consists of DSP control system, main drive circuit system and detection circuit system .The control system adopts TMS320F2812 DSP chip of TI Company. 更多还原
)
- 2011-03-01 12:08:36下载
- 积分:1
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FPGA编程:基于Verilog实现的DDS波形发生器
用FPGA实现DDS波形发生器。可以实现方波,三角波,正弦波的切换,实现频率的调节。三角波和正弦波均用查表法实现。本文档包括一个主程序的代码,按键和显示的实例化程序代码、调用ROM生成的代码以及正弦波和三角波实现的数据表。
- 2022-01-26 05:31:12下载
- 积分:1
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层合板刚度
层合板的刚度的计算和验算,包括拉伸刚度A、弯曲刚度D以及耦合刚度B。
首先要给定层合板的各个参数,具体有:层合板的层数N;各单层的弹性常数E1、E2、 、G12;各单层对应的厚度;各单层对应的主方向夹角 。(The stiffness of laminated plates is calculated and checked, including tensile stiffness, A, flexural stiffness, D and coupling stiffness B. First of all, it is necessary to give the parameters of laminated plates, such as the number of plies N, the elastic constants of each layer, E1, E2, and G12, the thickness of each monolayer, and the angle of the main direction corresponding to each single layer.)
- 2021-01-18 09:28:43下载
- 积分:1
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CPLD_PWM
一个在CPLD,EPM70128上实现的PWM控制源程序。(A CPLD, EPM70128 realize the PWM control on the source.)
- 2008-07-25 12:43:39下载
- 积分:1
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SHUMAGUAN
说明: FPGA 点亮数码管的灯,本例程支持6位数码管,因为我的FPGA开发板是这样子的(The lamp of digital tube illuminated by FPGA)
- 2020-06-18 10:20:02下载
- 积分:1
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基于FPGA的ASN.1编码单元的通用解码模块
本设计旨在实现一种硬件解码模块,这种解码针对ASN.1基本编码规则下的APDU的数据。这种解码模块可以应用在符合GB61850-8-1和GB61850-9-2标准下的GOOSE和SV的MAC层
帧的解码。
本设计亦可以解码通用的ASN.1基本编码规则下的TLV数据流。数据的TAG要求值不大于30,数据的长度范围为1≦LENGTH≦2047,TLV的层级结构不大于4级,整体的数据长度不大于2047。如果需要更大的解码能力则需要修改设计以满足需求。
- 2022-03-31 01:09:41下载
- 积分:1