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SRAM
进阶实验之SRAM测试,由verilog编写,可直接对sram进行存写(Advanced SRAM test experiments, written by the verilog, can be stored directly on the sram write)
- 2011-08-18 01:58:56下载
- 积分:1
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spi_ad
FPGA与DAC芯片的SPI接口驱动,实现串行数据的传输。(Realizing the communication between FPGA and DA chip)
- 2017-06-23 12:38:22下载
- 积分:1
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MRAM2012
STT-MRAM磁性存储器全部verilog代码和仿真验证代码,包括行为模块,读写模块和控制模块,已经经过验证完全正确(STT-MRAM magnetic memory all the code and simulation code, including behavior module, reader module and the control module, has been proven entirely correct)
- 2020-06-29 14:20:02下载
- 积分:1
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pingpangqiu
基于basys2的简单的乒乓球小游戏,通过ise13.4开发,使用语言VHDL,能够通过VGA在显示屏显示,能够实现双人对打,有计分功能。(Simple table tennis game, based on basys2 through ise13.4 development, using VHDL language, can through the VGA display shows, can achieve a double play, scoring function.)
- 2014-07-04 01:42:00下载
- 积分:1
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VER_I2C_EEPROM
EEPROM 的verilog仿真模型(cat24cxx系列)(verilog simulition Model of EEPROM,include cat24cxx)
- 2016-10-15 11:37:50下载
- 积分:1
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pcf8563
pcf8563,在quartusII下VERILOG编写的数字时钟程序,8位数码管显示(pcf8563, written in quartusII VERILOG digital clock program, eight digital display)
- 2013-12-24 21:46:21下载
- 积分:1
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Verilog_Ip_RAM
说明: altera ram ip教程。对RAM进行读写操作,写32个数据到RAM中,再将写入的32个数据从RAM中读出。(altera ram ip.write data to ram and read the data from the ram.)
- 2020-08-17 11:38:21下载
- 积分:1
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zuoye2
主要编写了一组二进制数据通过根升余弦滤波器后的波形,但并没有使用ISE内部的FIR滤波器内核,该程序相当于编写了一个根升余弦滤波器。(Mainly prepared a set of binary data through the root raised cosine filter waveform after, but did not use the ISE internal FIR filter kernel, the program is equivalent to the preparation of a root raised cosine filter.)
- 2013-09-18 15:24:13下载
- 积分:1
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ideal_6pulse
理想三相转单相 基于 spwm 的逆变器,可调(Ideal three-phase switch to a single the phase based spwm inverter)
- 2012-11-04 21:15:32下载
- 积分:1
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138
用vhdl 语言实现138译码器,用vhdl 语言实现138译码器,(vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl )
- 2009-04-21 12:32:17下载
- 积分:1