-
FPGA读写SDRAM的实例
FPGA对SDRAM进行读写测试程序,亲测有效无误。(FPGA reads and writes test programs for SDRAM.)
- 2017-09-18 14:51:53下载
- 积分:1
-
这是一个在Quartus II软件中编写的vhdl程序。程序下载后可用蜂鸣器播放音乐...
这是一个在Quartus II软件中编写的vhdl程序。程序下载后可用蜂鸣器播放音乐 -This is a Quartus II software in the preparation of the VHDL program. After the buzzer can be used to download music player
- 2022-06-14 11:30:29下载
- 积分:1
-
用verilog写的很好的cpu core
用verilog写的很好的cpu core-using Verilog write a good cpu core
- 2023-06-03 16:40:03下载
- 积分:1
-
ahb2apb-master
ahb to apb master and slave
- 2018-03-06 00:27:56下载
- 积分:1
-
Typical examples of character LCD interface 10.8 The Design and Implementation o...
典型实例10.8 字符LCD接口的设计与实现
软件开发环境:ISE 7.1i
硬件开发环境:红色飓风II代-Xilinx版
1. 本实例控制开发板上面的LCD的显示;
2. 工程在project文件夹里面
3. 源文件和管脚分配在
tl文件夹里面
4. 下载文件在download文件夹里面,.mcs为PROM模式下载文件,.bit为JTAG调试下载文件。-Typical examples of character LCD interface 10.8 The Design and Implementation of Software Development Environment: ISE 7.1i development environment hardware: Hurricane II on behalf of the red-Xilinx Edition 1. The above examples of the control board of the LCD display 2. Projects project folder inside 3. the distribution of the source file and pin in rtl folder inside 4. download files in download folder inside,. mcs file for the PROM mode download,. bit for the JTAG debugger to download the file.
- 2022-07-15 02:45:21下载
- 积分:1
-
SIREN
An Alarm Project Writen in VHDL for FPGA Devices
- 2010-10-01 16:37:48下载
- 积分:1
-
一款8位Turbo
一款8位Turbo-51的CPU软核的设计-An 8 Turbo-51" s soft-core CPU design ....
- 2022-02-25 13:52:11下载
- 积分:1
-
一个模拟ISA界面的简易小程式,简单易懂
一个模拟ISA界面的简易小程式,简单易懂-ISA interface, a simple simulation of a small program, easy-to-read
- 2022-07-24 01:55:08下载
- 积分:1
-
moore 状态机的一个简单的事例,初学者很好的地实例!
moore 状态机的一个简单的事例,初学者很好的地实例!-moore state machine of a simple example for beginners to very good example!
- 2022-08-03 06:34:52下载
- 积分:1
-
ahb2apb_bridge_verification-master
ahb to apb master verification
- 2021-03-23 22:09:15下载
- 积分:1