登录
首页 » VHDL » JTAG design verilog code.

JTAG design verilog code.

于 2022-02-14 发布 文件大小:4.03 kB
0 114
下载积分: 2 下载次数: 1

代码说明:

JTAG design verilog code.

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • thesis
    thesis for simple virus detection processor which is developed in xilinx
    2015-02-18 23:51:11下载
    积分:1
  • USB 1.1 PHY的代码,verilog语言 USB 1.1 PHY的代码,verilog语言
    USB 1.1 PHY的代码,verilog语言 USB 1.1 PHY的代码,verilog语言-USB 1.1 PHY code, verilog language USB 1.1 PHY code, verilog language
    2022-01-25 23:39:51下载
    积分:1
  • juanjima
    231卷积码的verilog实现,前面是详细的文档说明,有源程序,绝对原创!!!!(Verilog achieve 231 convolutional code, preceded by a detailed description of the document, the source, the absolute originality! ! ! !)
    2013-01-18 10:35:31下载
    积分:1
  • DDS now to the use of more extensive relative bandwidth, frequency conversion ti...
    DDS在现在运用月来越广泛,在相对带宽、频率转换时间、相位连续性、正交输出、高分辨力以及集成化等方面都远远超过了传统频率合成技术所能达到的水平,为系统提供了优于模拟信号源的性能。利用DDS技术可以很方便地实现多种信号。在FPGA上实现的DDS-DDS now to the use of more extensive relative bandwidth, frequency conversion time, phase continuity, quadrature output, high-resolution and integration, and other aspects far more than the traditional frequency synthesizer technology can achieve the level To provide a superior analog signal source performance. DDS technology can be used very easily to a variety of signal. FPGA Implementation of DDS
    2022-02-12 02:47:38下载
    积分:1
  • 基于DE2开发板的VGA显示模块,仅供大家参考
    基于DE2开发板的VGA显示模块,仅供大家参考-DE2 development board based on the VGA display module, for your reference
    2022-03-21 02:14:24下载
    积分:1
  • rfid new code
    In the data management system a significant role of the Data link layer is to convert the unreliable physical link between reader and tag into a reliable link. Therefore, the RFID system employs the Cyclic Redundancy Check (CRC) as an error detection scheme. In addition for reader to communicate with the multiple tags, an anti-collision technique is required. The technique is to coordinate the communication between the reader and the tags. The common deterministic anti-collision techniques are based on the Tree algorithm such as the Binary Tree and the Query Tree algorithms.
    2019-04-30 16:54:27下载
    积分:1
  • 用VERILOG语言编写的电子琴程序.用GW48教学实验箱仿真的
    用VERILOG语言编写的电子琴程序.用GW48教学实验箱仿真的-Using Verilog language organ procedures. GW48 teaching experiment with simulation boxes
    2022-03-01 23:12:48下载
    积分:1
  • DE2_115_SD_Card_Audio_Player
    该代码实现了对SD 卡的读写操作,是一个较好的范例。(The code achieves access reading SD CARD based on DE-2,It is a good example。)
    2012-08-14 00:29:47下载
    积分:1
  • 32位/33M 从模式(target)PCI接口参考设计,Lattice提供。由于PCI时序较复杂,此设计仅能供参考...
    32位/33M 从模式(target)PCI接口参考设计,Lattice提供。由于PCI时序较复杂,此设计仅能供参考-32/route from the model (target) PCI reference design, Lattice provided. Because PCI timing more complicated, and the design for reference only
    2023-09-04 17:30:04下载
    积分:1
  • Verilog HDL数字设计与综合 夏宇闻译(第二版)
    电子书籍 verilog HDL 数字设计与综合 夏宇闻所编写(electronic text Foreign electronic and communication textbooks)
    2021-01-15 15:18:45下载
    积分:1
  • 696518资源总数
  • 106161会员总数
  • 5今日下载