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ZBT SRAM controller reference design for Xilinx VHDL source code
ZBT SRAM控制器参考设计，xilinx提供的VHDL源代码-ZBT SRAM controller reference design for Xilinx VHDL source code
- 2023-02-16 08:00:04下载
- 积分：1
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spi
VHDL实现SPI功能源代码
-- The SPI bus is a 3 wire bus that in effect links a serial shift
-- register between the "master" and the "slave". Typically both the
-- master and slave have an 8 bit shift register so the combined
-- register is 16 bits. When an SPI transfer takes place, the master and
-- slave shift their shift registers 8 bits and thus exchange their 8
-- bit register values.(SPI realize the functional VHDL source code The SPI bus is a 3 wire bus that in effect links a serial shift register between the )
- 2021-04-29 10:58:43下载
- 积分：1
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Xilinx 7系列FPGA资料
说明： 对fpga的学习有一点帮助，属于较为基础的部分(It has a little help to the study of FPGA, which belongs to the more basic part)
- 2021-04-07 12:03:10下载
- 积分：1
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My-Simple-Specturm--Analyzer
基于LabVIEW FPGA的频谱估计与分析(the power spectrum estimation and analysis based on LabVIEW FPGA)
- 2013-11-13 08:45:40下载
- 积分：1
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Shift_reg
一个简单移位寄存器代码，verilog HDL编写(a simple shift register example，write with verilog HDL)
- 2012-03-26 21:36:01下载
- 积分：1
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FSK
2FSK的matlab仿真，叠加了高斯白噪声(2FSK matlab simulation, superimposed on a Gaussian white noise)
- 2021-04-13 02:58:56下载
- 积分：1
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juanji
说明： 采用vhdl语言编写的卷积编码（2.1.7），通过调试可直接下载使用(Convolution using vhdl language code (2.1.7) can be directly downloaded through the use of debugging)
- 2010-03-31 17:55:07下载
- 积分：1
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xapp888
说明： xilinx fpga各版本mmcm/pll动态配置RTL代码，包括testbench(xilinx fpga mmcm/pll drp RTL code, including testbench)
- 2021-01-21 21:38:46下载
- 积分：1
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20071026_091831_632
SOPC基于MATLAB与DSP Builder设计技术
实验使用说明，非常详细，易于上手(dsp builder)
- 2009-04-01 14:44:16下载
- 积分：1
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该源码为几个正弦ROM,已经编译并通过,可以直接下载,不需要,内部含有正弦ROM表,还有ROM的宏模块...
该源码为几个正弦ROM,已经编译并通过,可以直接下载,不需要,内部含有正弦ROM表,还有ROM的宏模块-the source for several sine ROM, has been compiled and passed, can be directly downloaded, not internal ROM containing sine table, the Acer ROM module
- 2022-02-15 13:48:53下载
- 积分：1
