-
src
假设每个从设备中有可访问APB寄存器16个，位宽均为32比特，16个寄存器的访问地址计算方式为 基址 + 寄存器编号左移２位（byte 偏移）(Assuming that there are 16 accessible APB registers in each slave device, the bit width is 32 bits, and the access address of 16 registers is calculated by base address + register number left shift 2 bits (byte offset).)
- 2020-12-15 13:49:14下载
- 积分：1
-
Taxi-automatic-billing
出租车自动计费系统的verilog程序代码(Taxi automated billing system verilog code)
- 2009-10-08 10:07:15下载
- 积分：1
-
dianziqin
运用quartus 软件模拟的电子琴，实现按键出现不同音调的音乐。(Quartus software simulation using keyboard, keys appear to achieve different tones of music.)
- 2013-07-03 14:57:05下载
- 积分：1
-
half_adrrrrder
FPGA上的一个半加器实例程序，通过测试，可以直接运行在fpga开发板上。(One and a half adder example on FPGA program, through the test, can be run directly on the FPGA development board)
- 2013-12-01 12:01:31下载
- 积分：1
-
地铁售票系统，基于VHDL，可实现站点设置，站点选择，选择购票数量，找零等一系列功能。...
地铁售票系统，基于VHDL，可实现站点设置，站点选择，选择购票数量，找零等一系列功能。-Metro ticketing system, based on VHDL, allows site settings, site selection, choose the number of tickets, Keep the change and a series of functions.
- 2022-02-16 02:43:18下载
- 积分：1
-
seg7
SEG7数码管显示示例程序，适用于ALTERA的CPLD(SEG7 digital display sample program of ALTERA CPLD)
- 2012-05-31 10:29:25下载
- 积分：1
-
Adder4
本设计是设计了一个4位全加器的内容，是由4个一位全加器串联而成的(The design is to design a full adder 4 content, is one of four full adder in series from the)
- 2009-05-11 19:50:58下载
- 积分：1
-
interr_timer0
interruption routine for PIC16F877
- 2009-12-30 00:43:05下载
- 积分：1
-
AD9226
一个AD9226芯片的驱动，用FPGA写的。虽然简单，但是希望对各位有帮助(An AD9226 chip driver, FPGA written. Though simple, but I hope you will help)
- 2013-09-05 01:47:36下载
- 积分：1
-
DE2_CCD_detect
de2,altera fpga
- 2011-04-14 11:14:32下载
- 积分：1
