登录
首页 » VHDL » vhdl经典源代码――LCD控制,入门者必须掌握

vhdl经典源代码――LCD控制,入门者必须掌握

于 2022-03-20 发布 文件大小:249.77 kB
0 137
下载积分: 2 下载次数: 1

代码说明:

vhdl经典源代码――LCD控制,入门者必须掌握-vhdl classical source code-- LCD control, beginners must master

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • rd1020
    Synchronous DRAM (SDRAM) has become a mainstream memory of choice in embedded system memory design due to its speed, burst access and pipeline features. For high-end applications using processors such as Motorola MPC 8260 or Intel StrongArm, the interface to the SDRAM is supported by the processor’s built-in peripheral module.
    2010-07-30 16:51:31下载
    积分:1
  • 1
    verilog 典型电路设计包含各种常用电路的源码和详细的解释,适合新手使用(Verilog typical circuit design includes a variety of commonly used circuit source code and detailed explanations, suitable for beginners to use )
    2014-03-19 10:48:41下载
    积分:1
  • pj_gtx
    利用高速口GTX进行快速的数据传输,包括接受和发送模块,用途广泛(The use of high-speed port GTX for fast data transmission, including receiving and sending modules, has a wide range of uses.)
    2019-03-25 21:40:10下载
    积分:1
  • xilinx the frequency generator VHDL source code, spartan3 can run in the learnin...
    xilinx提供的频率发生器的VHDL源码,可以运行在spartan3的学习开发板上。-xilinx the frequency generator VHDL source code, spartan3 can run in the learning development board.
    2022-04-28 04:38:57下载
    积分:1
  • 8位大小比较器
    说明:  8位大小比较器的VHDL源代码,Magnitude Comparator VHDL description of a 4-bit magnitude comparator with expansion inputs(eight compared with the size of the VHDL source code, Magnitude Comparator VHDL description of a 4-bit magnitude comparator inputs with expansion)
    2005-10-28 22:35:12下载
    积分:1
  • AT070TN83
    at070tn83 800x480 tft lcd verilog 測試 quartus 文件 (800x480 tft lcd at070tn83 testing project file)
    2020-12-07 15:39:21下载
    积分:1
  • FFT算法的VHDL语言实现 可在Modelsim上运行和调试
    FFT算法的VHDL语言实现 可在Modelsim上运行和调试 -FFT algorithm VHDL in the operation and Modelsim Debugging
    2022-06-17 11:09:01下载
    积分:1
  • count4
    这是一个基于Quartus2 开发环境的4输入加法器( 4adder basic on Quartus2)
    2013-08-04 09:45:07下载
    积分:1
  • 24小时时钟设计程序,含有时,分,秒的电路设计,基于VHDL语言,用Quartus 2程序实现。...
    24小时时钟设计程序,含有时,分,秒的电路设计,基于VHDL语言,用Quartus 2程序实现。-24-hour clock design process, with hour, minute, second circuit design, based on the VHDL language, using Quartus 2 program.
    2022-03-23 02:16:08下载
    积分:1
  • 数字频率计
    该项目用来测量频率。它有三个范围,其中包括 0.01 赫兹 ~ 1 Hz,1 ~ 100 Hz 和 100 ~ 10000 Hz。这样的结果将是最好的程序能自动调节到最佳的范围内。这个项目是在 Altera 软件 8.1 上进行验证。
    2022-08-26 07:45:48下载
    积分:1
  • 696516资源总数
  • 106571会员总数
  • 2今日下载