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codelock
说明: 用VHDL实现密码锁功能,用状态机实现,分管理员和用户两种功能,可分别修改密码,重置密码等。(codelock,VHDL,state)
- 2010-03-19 13:32:14下载
- 积分:1
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DW_apb_wdt
verilog实现watch dog,可直接用于芯片开发中。(erilog realization watchdog, can be directly used for chip development.)
- 2020-12-25 16:09:06下载
- 积分:1
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Version1
小波包分解,重构轴承振动信号,Hilbert包络,FFT进行频谱分析,以获得轴承故障频率。(Wavelet packet decomposition, reconstruction of bearing vibration signal, Hilbert envelope, FFT spectrum analysis to obtain the bearing fault frequencies.)
- 2013-07-17 11:37:05下载
- 积分:1
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多周期CPU设计 Verilog源码
本文件是用Verilog编写的多周期CPU的源码,文件里面含有CPU的连线图,用modesim编写,并且在Quartus II 下仿真通过,本代码将对初学者有很大的参考价值,欢迎大家下载!
- 2022-02-05 05:11:14下载
- 积分:1
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Carry look ahead adder with saturating arithmetic
用Verilog实现的16位进位先行加法器。实现了饱和算法。
- 2023-01-16 01:15:03下载
- 积分:1
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ps2键盘输入RS232串口输出(已验证)
ps2键盘输入, RS232串口输出键值(已验证)
- 2022-03-07 06:21:05下载
- 积分:1
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Crazy_FPGA_Examples
crazy bingo 韩彬将要出版的新书《FPGA设计技巧与案例开发详解》中的所有配套例程源码,主要涉及视频开发方向。(All the supporting source code routines crazy bingo Han Bin will be published book FPGA design techniques and case development explain in the video, mainly relates to the development direction of.)
- 2020-10-19 18:47:25下载
- 积分:1
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eth_frame_gen
帧激励产生器,用于VMM仿真中生成所需要帧以供测试所用(the use for test)
- 2012-02-02 22:19:25下载
- 积分:1
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dianzhen
基于FPGA的16*16点阵中文LED显示,另带有几个简单的中文汉字的点阵数据。(FPGA-based 16* 16 dot matrix Chinese LED display, and the other with a few simple lattice data Chinese characters.)
- 2014-05-30 21:47:37下载
- 积分:1
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FIFO
fifi asyncronous and syncronus
- 2012-04-30 02:31:24下载
- 积分:1