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prob1
UART program for fun(UART)
- 2009-11-18 10:26:04下载
- 积分:1
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FPGA时钟闹钟+电子琴+lcd显示
xlinx sparten 3E实验板,实现时钟闹钟功能,闹钟播放电子音乐,时钟,闹钟通过LCD屏显示。自己写的,亲测可用。
- 2022-03-05 16:40:01下载
- 积分:1
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Verilog语言手册
Verilog Language Manual
- 2022-04-19 20:28:43下载
- 积分:1
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COMPLETE-OFDM
完整的OFDM仿真程序,包括QPSK,16QAM调制,基于MATLAB,各个步骤都有详细的说明。(OFDM simulation program, based on the complete MATLAB, every step is described in detail.)
- 2013-05-23 11:31:57下载
- 积分:1
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VHDL语言实现摄像头的捕捉和采集,通过仿真验证,很好哈
VHDL语言实现摄像头的捕捉和采集,通过仿真验证,很好哈-vidicon s catch and collection in VHDL
- 2022-09-22 03:05:04下载
- 积分:1
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用VHDL编写的8259控制,供大家使用.
用VHDL编写的8259控制,供大家使用.-with VHDL control of the preparation of the 8259, for your use.
- 2023-07-08 01:55:02下载
- 积分:1
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A4_Led3
说明: led学习控制l44444444444444(led verilog led ccccccc)
- 2019-05-06 09:38:14下载
- 积分:1
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ram_dp_sr_sw[1]
dual port ram control (dual port ram control dual port ram control dual port ram control)
- 2011-06-07 10:47:03下载
- 积分:1
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ccd_tcp1209d-driver
ccd驱动程序,刺程序是tcd1209的驱动程序,能够修改积分时间(ccd driver stabbed program is tcd1209 driver can modify the integration time)
- 2021-02-23 09:49:40下载
- 积分:1
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Verilog 下脉冲发生器的源代码,可用于模拟三相交流电过零点,主要用于调试一些类似SVC(无功补偿)控制器的一些算法...
Verilog 下脉冲发生器的源代码,可用于模拟三相交流电过零点,主要用于调试一些类似SVC(无功补偿)控制器的一些算法-Pulse generator under the Verilog source code, can be used to simulate three-phase alternating current zero-crossing point, mainly for debugging similar SVC (reactive power compensation) controller of a number of algorithms
- 2023-06-15 23:20:03下载
- 积分:1