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ran_num_generator.tar
vhdl random numbergenerater
- 2013-04-10 16:31:28下载
- 积分：1
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wallace multiplier trees for 4:2
- 2022-02-10 01:12:10下载
- 积分：1
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8. For the key to enter a password lock, assuming that reset after the seven lam...
8对于输入密码锁的键，假设重置后七个灯显示" 0"，并且使用sw1、sw2、sw3 3，只需按任意sw1、sw2、sw3，将使七个灯显示值相加" 1
- 2022-07-16 11:58:58下载
- 积分：1
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Copy
this file describes the steps in building a fifo buffer module in verilog hdl and programming them on an fpga device
- 2020-06-21 21:00:02下载
- 积分：1
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用verilog语言编写的步进电机加减速控制算法 Motion_control
用verilog语言编写的步进电机加减速控制算法，可选择梯形曲线或S型曲线算法(Verilog language stepper motor acceleration and deceleration control algorithm, you can choose the trapezoidal curve or S-curve algorithm)
- 2021-03-19 15:39:19下载
- 积分：1
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CAN驱动器-MCP2515-接口程序-Verilog
CAN驱动器MCP2515驱动，verilog编写，实测可用(CAN driver MCP2515 driver, Verilog written, measured available)
- 2020-12-28 15:29:02下载
- 积分：1
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VGAzifuxianshi
用VERILOG编写的VGA字符显示，可以在电脑屏幕上显示字符,已通过测试(Prepared with the VERILOG VGA character display, can display characters on a computer screen, has been tested)
- 2011-01-01 14:50:47下载
- 积分：1
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verilog编写随机数产生源程序，在硬件电路设计中应用广泛。本程序是在LFSR and a CASR 基础上实现的...
verilog编写随机数产生源程序，在硬件电路设计中应用广泛。本程序是在LFSR and a CASR 基础上实现的-random number generator to prepare Verilog source code, in the hardware circuit design applications. This procedure is in the LFSR and a CASR based on the
- 2023-03-24 01:00:04下载
- 积分：1
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liuy
一个精确时钟的v-log程序，只用一个全局时钟，增加了精确度(An accurate clock in the v-log program, only one global clock, increased accuracy)
- 2010-08-25 12:26:25下载
- 积分：1
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用verilog写的各种实用的分频器，很好的参考例子。
用verilog写的各种实用的分频器，很好的参考例子。-Using Verilog to write a variety of practical divider, a good reference example.
- 2022-10-26 16:30:03下载
- 积分：1
