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用VHDL实现十六位移位乘法器 才有移位相加法来实现
用VHDL实现十六位移位乘法器 才有移位相加法来实现-Use VHDL to achieve 16-bit shift multiplier shift only the sum of law to achieve
- 2022-04-17 17:23:11下载
- 积分:1
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HDB3modelsim
说明: HDB3编码通过verilog实现,通过modelsim仿真(HDB3 coding is implemented by Verilog and simulated by Modelsim)
- 2020-06-18 05:20:02下载
- 积分:1
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ass1_3_safe
The objective of this project is to design and implement the controller for an electronic safe. You will interface a 16-button keypad to the NIOS boards. The combination code of the safe will be the last
- 2011-03-05 01:17:22下载
- 积分:1
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BISS-B---Stimulate_OK
BISS-B 源代码。包含传感器模式和寄存器模式(BISS-B source code. Includes sensor mode and register mode)
- 2021-03-15 19:29:22下载
- 积分:1
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sata3.0协议及FPGA各模块实现
说明: sata3.0协议及FPGA各模块实现,有代码及文档说明。(Sata3.0 protocol and FPGA module implementation, with code and documentation.)
- 2020-02-13 01:02:31下载
- 积分:1
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VGA
FPGA简单VGA彩条显示程序驱动程序640*480(FPGA simple VGA color display Driver 640* 480)
- 2013-11-22 09:14:35下载
- 积分:1
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VHDL for the hardware interface on the 8237 programming, you can carrying out fp...
关于vhdl对硬件接口8237的编程,可以在进行fpga/cpld设计是作为模块用到-VHDL for the hardware interface on the 8237 programming, you can carrying out fpga/cpld design is used as a module
- 2023-02-20 14:55:04下载
- 积分:1
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介绍了基于Altera 公司的CPLD 芯片FL EX10 K,以及利用VHDL 语言实现多位二进
制码转换成8421BCD 码的原理、设计思路和软件实现。...
介绍了基于Altera 公司的CPLD 芯片FL EX10 K,以及利用VHDL 语言实现多位二进
制码转换成8421BCD 码的原理、设计思路和软件实现。-Introduction based on Altera
- 2022-02-16 07:54:31下载
- 积分:1
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emifa_ram
FPGA与DSP的EMIF通信,EMIF的RAM这方面相应的程序(FPGA and DSP EMIF communication)
- 2020-12-01 15:49:26下载
- 积分:1
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I2C总线111
说明: 此程序为调试通过的程序,带有I2C总线功能的程序.(this procedure through the debugging process, with I2C bus function procedures.)
- 2005-11-05 13:51:27下载
- 积分:1