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Clutter-Filtering-
。给出了时域滤波的基本原理以及通常采用的
IIR 椭圆地物杂波滤波器的设计方法。重点研究了回归滤波器这一时域滤波算
法。从正交多项式的拟合出发,给出了回归滤波器抑制地物杂波的基本原理及
其滤波实现过程。通过对回归滤波器的计算复杂度的研究,寻找使回归滤波器
计算量最小的正交多项式。分析了回归滤波器频率响应特性,比较了回归滤波
器与IIR 椭圆地物杂波滤波器的计算复杂度。利用仿真的雷达信号,分析了回
归滤波器的地物杂波抑制性能。回归滤波器实际上是一高通滤波器,它在滤掉
低频地物杂波的同时,对落在滤波器阻带内的天气回波信号同样会造成衰减。
在天气回波信号谱宽固定的情况下,通过改变天气回波信号的平均多普勒频率,
分析了回归滤波器对它的衰减情况。在基于一组实际采集的雷达信号的基础上,
给出了回归滤波器的地物杂波抑制比随着滤波器阶数的变化情况。(Firstly, this dissertation introduces the research background and significance of
ground clutter suppression, analyzes the characteristics of the ground clutter and
weather signals in the Doppler weather radars and simulates Doppler radar echo
signals (It includes ground clutter, weather echo signals and the mixture of them).
The simulated signals are used later to study the time and frequency domain ground
clutter suppression.
Secondly, this dissertation talks about the time domain filtering, gives the basic
theory of time domain filtering and describes the design method of the usually used
fifth-order elliptic infinite impulse response (IIR) ground clutter filter. In the time
domain, the work focuses on the regression filter. From the orthogonal polynomials
fit, this dissertation gives the basic theory of the regression filter for ground clutter
suppression and the filtering process using a regression filter. Through the study of
the computational complexity of regression)
- 2012-07-09 22:12:11下载
- 积分:1
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gamefive
高精度小数除法器设计与实现。
在FPGA开发板上实现小数除法器,输入输出信号N_in [15:0], D_in[15:0],N_in[15:0]小于D_in,即被除数小于除数,输出商Q_out[15:0]中Q[15]一定为0,Q[14:0]为商的小数部分。输入和计算结果通过VGA显示。(Precision fractional divider design and implementation. In the FPGA development board fractional divider, input and output signals N_in [15: 0], D_in [15: 0], N_in [15: 0] less than D_in, ie the dividend is less than the divisor, quotient output Q_out [15: 0] in Q [15] necessarily 0, Q [14: 0] for the business of the fractional part. Input and calculation results display by VGA.)
- 2017-01-01 17:32:25下载
- 积分:1
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79_ALU
这也是VHDL语言编写的一个小程序,对于VHDL入门很有帮助~~(This is a small program VHDL language, VHDL entry-helpful ~ ~)
- 2013-03-29 11:02:43下载
- 积分:1
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clkdiv
基于Verilog的FPGA时钟分频程序(FPGA clock frequency division program based on Verilog)
- 2018-06-10 17:08:57下载
- 积分:1
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FifoinFIFO
systemc实现的一个fifo,对想要学习systemc的同学很有帮助哦(A fifo systemc achieved, the students want to learn systemc helpful oh)
- 2021-04-18 00:28:52下载
- 积分:1
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fpga led
led大显示屏发送卡代码,非常珍贵的,大家多多下载,和CODEFORGE网站共同发展,谢谢这个网站,这么多资源,对软件工程师真的是非常有用,再次感谢
- 2022-01-27 23:17:04下载
- 积分:1
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HM74YM
在QUARTUS II上实现(7,4)汉明码的译码VHDL语言设计((7,4)Hamming decoder)
- 2015-05-09 11:14:17下载
- 积分:1
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gtx_interface_ip
高速串行设计FPGA-GTX IP设置生成,可动态配置速率2.4Gbps,1.2Gbps,0.6Gbps,自适应链接(High-speed serial design FPGA-GTX IP settings generated dynamically configurable rate of 2.4Gbps, 1.2Gbps, 0.6Gbps, adaptive link)
- 2016-09-22 09:48:00下载
- 积分:1
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100powertips
these are the source codes for the book " 100 power tips for FPGA designers"
- 2012-08-20 14:59:29下载
- 积分:1
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HDB3
FPGA实验_HDB3编码器设计(包含5个模块)(FPGA design experiments _HDB3 encoder (including 5 modules))
- 2020-11-30 10:29:28下载
- 积分:1