-
ymq.ppt.tar
掌握二-十进制(BCD码)异步计数器的工作原理和设计方法;
掌握中规模集成二-五-十进制异步计数器74LS90的功能及其应用;(Master II- Decimal (BCD code) the principle and an asynchronous counter design grasp the scale of integration in two- five- Decimal asynchronous counter 74LS90 features and applications )
- 2011-04-26 21:53:37下载
- 积分:1
-
Project_Gbit
说明: pc与fpga之间通过千兆以太网交换机实现网络通信(Network communication between PC and FPGA via Gigabit Ethernet switch)
- 2020-06-17 20:40:04下载
- 积分:1
-
agc
数字自动增益控制 AGC (automatic gain control) Verilog(automatic gain control Verilog)
- 2021-03-11 19:29:25下载
- 积分:1
-
sixlift
一个数字电路设计:六层电梯自动运行的VHDL程序(a digital circuit:sixlift design)
- 2013-05-02 19:31:59下载
- 积分:1
-
UART_DMA
UART_DMA的方法是使用nios实现UART方式实现DMA传输,在硬件平台上通过验证实现(UART_DMA way is to use uart dma transfer nios implemented in the hardware platform validated by)
- 2020-11-03 10:39:53下载
- 积分:1
-
altera
altera官方的各种有用的参考资料,都是自己收集的,遇到问题可以很方便的查看(altera official variety of useful references, are their own collection, problems can easily view)
- 2014-06-02 10:39:18下载
- 积分:1
-
verilog HDL语言的综合实验
BM1拨上实现流水灯功能(用LED灯显示)
BM2拨上实现ADC0804功能(用数码管显示)
BM3拨上实现TLC5620功能(用数码管显示)
BM4拨上实现点阵功能(用16*16点阵显示“欢”)
BM5拨上实现LCD1602功能(用1602液晶显示“学号”(第1行),“姓名(拼音)(第2行)
BM6拨上实现频率计功能(用数码管显示频率值)
- 2022-12-11 15:55:05下载
- 积分:1
-
verilogVGA驱动
完整的verilog编写的源代码,根据实际所用的器件,修改相关参数,就可实现VGA的驱动。
- 2023-06-15 03:31:33下载
- 积分:1
-
dingshi
定时器加数码管显示源码,以及test bench测试模块源码,经modelsim仿真结果正确(Timer plus digital display source code, and test bench test module source code, by modelsim simulation results are correct)
- 2013-07-27 10:34:41下载
- 积分:1
-
multifre
说明: 资料的内容是实现旋转机械同步整周期采样的数据采集系统相关文献资料,包括鉴相信号如何倍频,机械振动信号相位如何检测等的实现方法。(Information content is for rotating mechanical synchronization synchronous sampling data acquisition system-related documents, including the Kam-believe number to harmonic mechanical vibration signal phase to detection of realization.)
- 2010-04-26 15:56:20下载
- 积分:1