登录
首页 » Verilog » FPGA I2C IP

FPGA I2C IP

于 2022-05-22 发布 文件大小:583.44 kB
0 93
下载积分: 2 下载次数: 1

代码说明:

应用背景i2cSlave is a minimalist I2C slave IP core that provides the basic framework for the implementation of custom I2C slave devices. The core provides a means to read and write up to 256 8-byte registers. These registers can be connected to the users custom logic, thus implementing a simple control and status interface.关键技术The core has up 256 registers that can be accessed via I2C. I2C write operations are used to set the register address pointer, and write the register data. I2C reads are used to read the register data. Successive data reads or writes result in data being read or written from incremental register addresses. There is no limit on how much data can be read or written in a single access, but the internal register address pointer will wrap round to 0 once it reaches 255. Note that the address pointer is not initialized at reset, and the address pointer must

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • LCD1602
    通过编写verilog语言完成数据的在液晶LCD1602显示(By writing verilog language to complete the data displayed on the LCD LCD1602)
    2013-08-04 13:12:05下载
    积分:1
  • top
    脉冲多普勒雷达回波信号相干积累的VHDL源程序(pulse Doppler radar echo signal coherent accumulation of VHDL source)
    2021-04-22 20:28:48下载
    积分:1
  • Verilog数字系统设计教程(第二版) 夏宇闻
    Verilog数字系统设计教程(第二版) 夏宇闻(Verilog Digital System Design Course (2nd Edition) Xia Yuwen)
    2020-06-20 18:40:02下载
    积分:1
  • verilog code of counter with clock divider for fpga implementation
    带时钟分频器的计数器的代码是用verilog编写的。代码是用verilog HDL编写的,完全可以合成,可以在FPGA上实现;
    2022-10-05 15:10:03下载
    积分:1
  • CodedLOCK
    基于FPGA的电子密码锁设计与实现,语言是VHDL语言,有注释(FPGA-based design and implementation of electronic locks, language is VHDL language, annotated)
    2013-08-27 21:37:06下载
    积分:1
  • vhdl-golden-reference-guide
    vhdl golden reference guide
    2012-12-31 03:56:13下载
    积分:1
  • FPGA_Turbo
    Turbo码编解码的FPGA实现,verilog语言编写(Implementation ofTurbo code on FPGA , using Verilog language)
    2021-04-19 09:48:51下载
    积分:1
  • DDS
    文利用直接数字频率合成器(DDS)与CPLD技术和单片机控制技术,研制和 设计了高分辨率、高稳定度的函数信号发生(Wen using direct digital frequency synthesizer (DDS) and CPLD technology and single-chip microcomputer control technology, development and Design of high resolution, high stability function of the signal )
    2013-08-27 14:20:22下载
    积分:1
  • 74ls138-integral-4-wire-encoder-16
    74ls138组成16..4线编码器 经过本人验证(74ls138 composed of 16 .. 4 line encoder after I verify)
    2011-09-20 19:00:59下载
    积分:1
  • 13.2_MotionDetec
    基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,基于视频的运动检测(System Generator based image processing engineering, multimedia processing on FPGA source code, based on video motion detection)
    2020-10-23 20:57:22下载
    积分:1
  • 696518资源总数
  • 105559会员总数
  • 1今日下载