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ViterbiAlg
说明： Viterbi译码,IS-95中的1/2码率的卷积码(Viterbi decoding, IS-95 of 1/2 the rate Convolutional Codes)
- 2006-04-11 14:10:58下载
- 积分：1
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FPGA
verilog编写的QPSK发射机的ＦＰＧＡ部分，已经过验证，完全达到要求。调制矢量误差４％(QPSK transmitter verilog prepared by the FPGA portion, has been proven, fully meet the requirements. Modulation vector error of 4 )
- 2013-10-08 14:58:23下载
- 积分：1
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BT656_RGB
BT656转RGB的算法实现代码，使用VORILOG语言编写(BT656-->RGB, verilog)
- 2021-02-24 09:39:39下载
- 积分：1
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agc_gen
AGC(自动增益放大) Verilog代码 设计可以参考(AGC (automatic gain control) can refer to the Verilog code design
)
- 2015-04-14 01:16:13下载
- 积分：1
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数字系统实施和外围设备接口
这些文件是可以帮助我们初学者在超大规模集成电路与 FPGA 设备接口的外围设备。ALU 单元介绍算术和逻辑单元的功能和其在 FPGA 中的实现。Mutiplication 和积累股职能有 MAC 单元程序。在电机相接，陡峭电机运行中前进的方向。液晶屏显示程序可以帮助我们在 16 × 2 显示中显示的 ASCII 字符。串行通讯程序将传输和接收字符从和到的 FPGA 和 PC。
- 2022-02-14 12:34:33下载
- 积分：1
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tcpip_stack_v1_2
说明： 实现ARP、ICMP、UDP、TCP、IP和MAC全过程的传输，对TCP的连接、接收、发送、断开均经过测试，功能正常(Realize the transmission of ARP, ICMP, UDP, TCP, IP and MAC in the whole process, test the connection, reception, transmission and disconnection of TCP, and the function is normal)
- 2020-05-05 10:03:04下载
- 积分：1
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Chapter10
第十章的代码。
本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示(Chapter X code. This book by more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of additions device/counters, multipliers/dividers, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and the results demonstrate)
- 2009-11-17 13:52:32下载
- 积分：1
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list_ch06_02_debounce
Eliminate the program of key bounce
- 2012-12-23 00:22:42下载
- 积分：1
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eBook_Verilog_HDL--Guide_to_Digital_Design_Synthes
说明： 对于有经验的用户和新用户写的，这本书给您的Verilog HDL的广泛报道。该书强调了实际设计和验证的角度，而不是只注重Verilog的语言方面。(Written for both experienced and new users, this book gives you broad coverage of Verilog HDL. The book stresses the practical design and verification perspective ofVerilog rather than emphasizing only the language aspects. )
- 2010-04-15 01:27:30下载
- 积分：1
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Verilog乒乓操作实现的代码
利用verilog实现乒乓双缓存代码，比异步FIFO更可靠地缓存。
- 2022-02-26 23:38:45下载
- 积分：1
