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fpga_2014_flappy_bird
用VHDL语言写了个FLAPPY_BIRD的程序，利用板子与屏幕可以运行游戏(VHDL language to write a program FLAPPY_BIRD by the board and the screen can run the game)
- 2020-11-06 09:59:49下载
- 积分：1
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ml505_mig_design
Xilinx开发板ML505的DDRII示例程序，使用Verilog，调用MIG，编译环境ISE11.1(Xilinx ML505 development board of DDRII sample program, using Verilog, called MIG, build environment ISE11.1)
- 2010-05-13 02:39:04下载
- 积分：1
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VGA显示接口的verilog控制程序。VGA显示驱动控制
VGA显示接口的verilog控制程序。用于VGA显示器的控制驱动-VGA display interface Verilog control procedures. Control for VGA display driver
- 2022-04-10 10:17:35下载
- 积分：1
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大唐电信的FPGA设计经验，内部资料，详细完整，很有参考价值...
大唐电信的FPGA设计经验，内部资料，详细完整，很有参考价值-Datang Telecom
- 2022-03-04 13:47:05下载
- 积分：1
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freq
vhdl八位十进制数字频率计的设计，顶层和数码管扫描模块(vhdl eight decimal digital frequency meter design, top-level and digital tube scanning module)
- 2012-10-09 15:09:22下载
- 积分：1
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elpiano
自己写的FPGA实现电子琴的VHDL程序，曲目是两只老虎，用到一些模块，和片内存储间，呵呵(FPGA realization of his keyboard to write the VHDL program, tracks are two tigers, a number of modules used, and on-chip storage room, huh, huh)
- 2020-12-28 01:39:02下载
- 积分：1
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16QAM
16QAM调制解调程序画出时域波形、 正交分量、同相分量波形，眼图，散点图等(16QAM modulation and demodulation process to draw time-domain waveform, quadrature components, in-phase component waveforms, eye diagrams, scatter plots, etc.)
- 2013-06-04 22:10:41下载
- 积分：1
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在QuartusII运用ＡＨＤＬ语言，首先设计出PN发生器来产生一个11位的数据流在整个周期内有效数据有 =2047位；再设计状态机用来检测串行数据流中的序列。...
在QuartusII运用ＡＨＤＬ语言，首先设计出PN发生器来产生一个11位的数据流在整个周期内有效数据有 =2047位；再设计状态机用来检测串行数据流中的序列。运用两个个计数器分别对PN码计数以及序列出现的次数计数。改变ＰＮ码结构可以作为通用数列检测器-QuartusII use in AHDL language, the first PN generator designed to generate a data stream 11 throughout the cycle has an effective data = 2047 re-designing the state machine used to detect the serial data stream in sequence. The use of two counters were counting on the PN code, as well as counting the number of sequences occur. Changes in the structure of PN code series can be used as general-purpose detector
- 2023-03-11 09:20:03下载
- 积分：1
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SRAM6bit
sram 6bit仿真模型，verilog编写(sram 6bit simulation model, verilog prepared)
- 2021-03-16 13:59:22下载
- 积分：1
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0001_EPM3064最小系统模块_带JTAG_LED_2mm插针
EMP3064的开发板板，原理图，verilog例子，板子说明，规格书，全套资料(EMP3064 development board, schematics, Verilog examples, board instructions, specifications, a full set of information)
- 2020-12-01 09:29:26下载
- 积分：1
