-
pcf8563
pcf8563,在quartusII下VERILOG编写的数字时钟程序,8位数码管显示(pcf8563, written in quartusII VERILOG digital clock program, eight digital display)
- 2013-12-24 21:46:21下载
- 积分:1
-
FPGA ‘for’ 循环
Verilog 语言编写的for循环,用来验证在FPGA中是否能想在C中那样编写for循环,结果证明虽然仿真可以得到正确的结果,但是在真正的工程中进行编译时耗时24小时都没完成,所以选择其他的方法进行循环操作,毕竟FPGA是并行的,而C中是串行的思想。
- 2022-06-19 04:55:07下载
- 积分:1
-
sample_SPI
这是一个瑞萨R78/G13的SPI演示程序,详细的放置了说明,很有用的源码(This is one of the SPI Renesas R78/G13 demonstration program, placed a detailed description of very useful source)
- 2013-09-03 02:59:19下载
- 积分:1
-
可编程波发生器
这是波发生器的顶层。它直接实例化 I/O 垫和实现设计所需的所有子模块。
- 2023-01-25 04:20:04下载
- 积分:1
-
EMAC6
verilog实现的FPGA三态以太网链路层通信代码,里面有状态机,并按各个模块的功能分了文件夹,还有说明文档,自定义帧的产生和接收,开发环境为Xilinx ISE,测试无误。(verilog realization FPGA Tri-Mode Ethernet link layer communication code, which the state machine, according to the function of each module sub folder, as well as documentation, self-defined frame generation and reception, the development environment for the Xilinx ISEtest and correct.)
- 2013-01-09 00:04:20下载
- 积分:1
-
01_test
FPGA测试程序,仅供测试硬件是否能够运行,主要功能是点亮运行指示灯(The main function of the test program of FPGA is to light the running indicator.)
- 2019-06-20 03:21:28下载
- 积分:1
-
yiweijicunq
说明: 16位右移位寄存器
下面描述的是一个位宽为16位的右移位寄存器,实际具有环形移位的功能,是在右移位寄存器的基础上将最低位的输出端接到最高位的输入端构成的。其功能为当时钟上升沿到达时,输入信号的最低位移位到最高位,其余各位依次向右移动一位。(16-bit right shift register
The following description is a right shift register with a bit width of 16 bits. It actually has the function of circular shift. It is based on the right shift register, which connects the lowest bit output terminal to the highest bit input terminal. Its function is that when the rising edge of the clock arrives, the lowest displacement of the input signal reaches the highest position, and the rest of you move one bit to the right in turn.)
- 2020-08-18 09:58:21下载
- 积分:1
-
FPGA_Seg7_dsp
关于VHDL和verilog的数码管显示程序,写的很好,值得参考。(About VHDL and verilog digital tube display program, write well, worth considering.)
- 2014-08-01 11:00:51下载
- 积分:1
-
DDR3
spartan6 里使用DDR3IP核,有教程以及源码(spartan6 with ddr3,source and tutorial)
- 2021-01-07 08:48:52下载
- 积分:1
-
13.3_Tracing
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,基于视频的运动跟踪(System Generator based image processing engineering, multimedia processing on FPGA source, video-based motion tracking)
- 2020-11-04 17:39:51下载
- 积分:1