-
12
说明： 用FPGA进行等精度频率和相位差测量的程序，本程序是在EPEC6Q240C8下的程序(Carried out with the FPGA such as the frequency and phase measurement precision of the procedure, this procedure was the procedure under the EPEC6Q240C8)
- 2010-03-03 17:42:11下载
- 积分：1
-
Xilinx_AXI
说明： AXI verilog designs with testbench: AXI-lite, AXI, AXI-stream
- 2020-04-21 01:18:30下载
- 积分：1
-
一个基于VerilogHDL语言的16位的booth算法的乘法器及其测试代码
一个基于VerilogHDL语言的16位的booth算法的乘法器及其测试代码-VerilogHDL language based on the 16-bit multiplier of the booth algorithm and test code
- 2022-02-07 12:03:36下载
- 积分：1
-
基于FPGA的实现小数倍分频代码，广泛应用于数字通信中。
基于FPGA的实现小数倍分频代码，广泛应用于数字通信中。-FPGA-based implementation of a small multiple of sub-frequency code, widely used in digital communications.
- 2022-04-19 03:39:18下载
- 积分：1
-
CO_2
说明： 激光测速研究，主要介绍多普勒激光测速知识(Laser velocimetry study introduces laser-Doppler velocimetry knowledge)
- 2008-10-24 22:29:44下载
- 积分：1
-
ldpc_decoder_802_3an
802.3an ldpc码编码、译码设计，使用VERILOG hdl语言编写，包括测试代码，(802.3an ldpc code encoding, decoding the design, use of language VERILOG hdl, including test code,)
- 2021-02-14 15:29:49下载
- 积分：1
-
hdb3_v3
Quartus环境下使用Verilog编写的HDB3编解码程序，RTL和时序仿真已过(Quartus under the environment of a HDB3 protocol procedures written in Verilog, RTL and timing simulation has be passed)
- 2015-11-24 21:56:05下载
- 积分：1
-
pn_gen_vhd_211
通信中常用的PN序列产生器的源代码全部打包(Communications commonly used in PN sequence generator, the source code of all packaged)
- 2009-02-04 15:41:17下载
- 积分：1
-
uvm_use_pipelined_ahb
一个简单的uvm搭建的ahb简单实例,包含了各个组件以及编译的运行的脚本(one sample example about ahb，include every component and compile script)
- 2020-10-21 12:17:24下载
- 积分：1
-
BOOTH
基于BOOTH的32位快速乘法器的设计源码-BOOTH-based 32-bit fast multiplier design source
- 2022-02-16 09:50:44下载
- 积分：1
