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VHDLexample
VHDL开发程序,有程序仿真的截图,方便验证调试结果。并有程序说明(VHDL 驴 陋 垄 鲁 脤臑貌 拢 卢 脫臑 鲁 脤臑貌 脗脮忙渭脛 陆 脴脥 录拢卢路陆卤 茫脩茅脰 陇 渭 梅 脢脭 陆 谩 鹿 没 隆 拢 虏 垄 脫臑 鲁 脤臑貌脣渭脙 梅)
- 2008-04-10 16:11:04下载
- 积分:1
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01_基于ZYNQ的FPGA基础入门
说明: VIVADO SOC 使用文档 基于zynq 7020(vivado soc example text of zynq)
- 2020-06-17 12:00:01下载
- 积分:1
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flv的vhdl教学文件:在线调试
自己慢慢欣赏吧
flv的vhdl教学文件:在线调试
自己慢慢欣赏吧-flv file of VHDL Teaching: Online debug their慢慢欣赏吧
- 2022-05-22 02:55:52下载
- 积分:1
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And the string conversion of the code is relying on the synchronization state ma...
这个并串转换代码是依靠同步状态机来实现其控制的。其实并串转换在实际的电路中使用还是比较多的,尤其在通信线路方面的复用和分解方面,原理上就是一个串并转换和并串转换的过程。举个简单的例子,计算机串口发送数据的过程,如果满足发送条件了,其实就是一个并串转换的过程了。好了,废话不说,看代码就是。
-And the string conversion of the code is relying on the synchronization state machine to achieve its control. In fact, string conversion circuit in the actual use of, or more, particularly in the area of communication lines and the decomposition of reuse, the principle is a string and the conversion and the conversion process and string. Here is a simple example, the computer serial port of the process of sending data, if sent to meet the conditions, but in fact is a process of conversion and a string. Well, do not talk nonsense, look at the code is.
- 2022-03-29 17:46:13下载
- 积分:1
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Classic_Manual_Verilog_programming_language
Verilog编程语言经典手册Classic Manual Verilog programming language(Verilog programming language classic manual Classic Manual Verilog programming language)
- 2010-07-30 09:31:49下载
- 积分:1
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用VHDL语言编写的一个控制程序,主要功能是输入码同步,输出字和帧信号...
用VHDL语言编写的一个控制程序,主要功能是输入码同步,输出字和帧信号-VHDL language using a control program, the main function is to input code synchronization, and frame signals output word
- 2023-04-27 22:40:03下载
- 积分:1
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圆形的 FIFO 缓冲区
这是在 vhdl 的简单循环的拳头在后进先出队列。缓冲区的大小和数据大小可以通过 N 和 W 的参数配置。队列最前面的是可用输出数据。两个信号控制写入和读取数据。如果缓冲区是空的还是满的两个输出信号信息。
- 2022-02-27 02:21:06下载
- 积分:1
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LaurentCPM
Laurent程序,用于CPM信号的调制,接收和分解,译码,以及判断(Laurent procedures for CPM modulation of the signal, and decomposition receiving, decoding, and to determine)
- 2013-08-16 01:32:40下载
- 积分:1
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verilog例子很丰富,几个经典的,希望对初学者有所帮助
verilog例子很丰富,几个经典的,希望对初学者有所帮助-verilog examples of very rich, a few classic, and want to be helpful for beginners
- 2023-03-17 19:05:03下载
- 积分:1
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altera fpga verilog 设计的基于查找表的DCT程序及zigzag扫描程序,已经过matlab 和modelsim
验证,文件中包含TEST...
altera fpga verilog 设计的基于查找表的DCT程序及zigzag扫描程序,已经过matlab 和modelsim
验证,文件中包含TESTBENCH ,直接可用-altera fpga verilog design table DCT-based search procedures and zigzag scanning procedures, and ModelSim matlab has been verified, the document contains TESTBENCH, directly available
- 2022-05-31 13:50:54下载
- 积分:1