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mealy_sequence
实现米粒状态机
用verilog语言实现状态机的过程(Implement a state machine with a grain of rice verilog state machine language course)
- 2011-11-09 19:02:27下载
- 积分：1
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lesson38_lcd1602_clander
说明： 基于Verilog语言编写的LCD1602显示的日历程序，类似时钟功能值得参考。(LCD1602 shows calendar program based on Verilog language, similar clock function is worth reference.)
- 2019-05-26 09:29:18下载
- 积分：1
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8bit_frequency_meter
说明： 设计一个8位的简易频率计，测出信号的频率，即1s内变化的次数。(An 8-bit simple frequency meter is designed to measure the frequency of the signal, i.e. the number of changes in one second.)
- 2020-06-21 13:40:01下载
- 积分：1
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cycle_measure
测量周期,此程序已经在EP2C板子上成功实现(mesure cycle)
- 2013-08-29 16:09:17下载
- 积分：1
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6_Sets_of_8051_VHDL_Verilog
it has 6 packages of 8051 sources,including source code(VHDL and Verilog),dc scripts, pdfs, netlists etc. and a MIPS IP package
- 2012-07-02 10:56:02下载
- 积分：1
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VHDL-Code-For-Full-Adder-By-Data-Flow-Modelling
VHDL Code For Full Adder By Data Flow Modelling
- 2013-11-08 00:39:04下载
- 积分：1
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用Matlab编写fft
说明： 在MATLAB下自编实现快速傅里叶分析，(Fast fft own procedures, faster than the system call fft slowe)
- 2020-06-23 09:00:02下载
- 积分：1
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二极管的hspice模型代码
基于verilog-a的自建模型，可以作为任何代建模型的参考，理解hspice模型的构成，内在根本机理。
- 2022-05-26 08:04:18下载
- 积分：1
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vhdl1008
说明： PCI slave IP core, in VHDL language ,has been verified,it is very easy to use.
it is an ideal IP to study PCI,design PCI Bridge
- 2020-06-18 18:20:01下载
- 积分：1
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system
清华大学电子课程设计：Verilog，QuartusII可正确运行，可下载到FPGA上，完成远程通信的整体任务，PC发数据，键盘输入运算符与运算数计算将结果显示在数码管上并返回给PC机，需异步串口调试软件(Verilog, QuartusII run correctly, can be downloaded to the FPGA, to complete the overall task of remote communication, PC send data, keyboard operators and operands calculation displays the results in digital tube and returned to the PC, to be asynchronous serial debugging software)
- 2020-08-16 23:38:25下载
- 积分：1
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