登录
首页 » VHDL » UART VHDL Quartus

UART VHDL Quartus

于 2022-03-13 发布 文件大小:207.86 kB
0 141
下载积分: 2 下载次数: 1

代码说明:

uart的vhdl实现,包含完整quartus工程文件,相信会有较大帮助-uart vhdl quartus

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • Roy dsd
    说明:  basic verilog code on siso, piso, sipo
    2020-06-25 18:40:01下载
    积分:1
  • codes
    EKG SIGNAL PROCESSING THROUGH CORDIC
    2013-09-29 01:46:17下载
    积分:1
  • pingpong
    用Verilog代码实现的乒乓操作,用Verilog代码实现的乒乓操作(Verilog pingpong)
    2016-01-15 17:35:06下载
    积分:1
  • DDA_xy
    说明:  运用Verilog 语言进行数字积分法,将X轴和Y轴进行插补运算。(Verilog language using digital integration method, the X axis and Y axis interpolation operations.)
    2020-11-27 18:19:30下载
    积分:1
  • nfc
    近场通信的verilog描述,包含向量名定义,顶层设计等等的精确描述(Verilog description of near field communication, including the vector name is defined, an accurate description of the top-level design, etc.)
    2015-08-11 15:27:41下载
    积分:1
  • 系统设计
    基于数码管独立显示和三色灯的交通指示系统设计(Design of Traffic Indicator System Based on Digital Tube Independent Display and Tri-color Lamp)
    2020-06-21 02:00:01下载
    积分:1
  • A complete viterbi coding procedures, the use of VHDL language, as well as test...
    一个完整的viterbi编码程序,使用vhdl语言编写,还有测试程序-A complete viterbi coding procedures, the use of VHDL language, as well as test procedures
    2022-04-12 08:34:41下载
    积分:1
  • DDR2 SDRAM仿真模型,适合于ModelSim下工作,请先阅读readme
    DDR2 SDRAM仿真模型,适合于ModelSim下工作,请先阅读readme-DDR2 SDRAM Simulation Model which is suitable for modelsim. Please read readme file firstly.
    2022-02-25 20:23:26下载
    积分:1
  • xge_mac_latest.tar
    Ethernet 10GE MAC 以太网10G的MAC Verilog代码实现(Ethernet 10GE MAC)
    2010-07-31 10:04:20下载
    积分:1
  • 数字钟的VHDL源程序,可以实现在学校、年级的壮举…
    数字钟的VHDL源程序,可以实现校时,校分等功能,并在试验箱上运行成功-The VHDL source code digital clock, you can achieve at school, school grade features, and success in the chamber is running on
    2022-06-12 19:46:36下载
    积分:1
  • 696516资源总数
  • 106415会员总数
  • 3今日下载