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eetop.cn_dds
基于verilog的DDS设计,内附代码,仿真环境等说明(the DDS design based on verilog)
- 2015-07-14 08:20:51下载
- 积分：1
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verilogVGA驱动
完整的verilog编写的源代码，根据实际所用的器件，修改相关参数，就可实现VGA的驱动。
- 2023-06-15 03:31:33下载
- 积分：1
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tongbu
使用VERILOG开发时钟同步算法，能够从数据信号中提取时钟信息，(Clock synchronization algorithm using VERILOG developed to extract the clock from the data signal information,)
- 2020-11-11 12:39:44下载
- 积分：1
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fpgaConfig_V1_2_SFLASH_20090507a
自己写的一个使用单片机配置FPGA的下位机C代码，使用一个C8051F330,外置SPI FLASH,通过串口可将程序写入FLASH,上电时自动加载到FPGA完成配置。(Wrote it myself, using a microcontroller to configure FPGA code for the next bit plane C, using a C8051F330, external SPI FLASH, the program is written through the serial port can be FLASH, power-on automatically loaded into the FPGA to complete the configuration.)
- 2021-02-16 07:29:47下载
- 积分：1
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homework32
说明： 这是32位移位寄存器，是用verilog编写的，能够实现从1到31位的左或右的移位(This is a 32-bit shift register, is prepared verilog, can be realized from the 1-31 shift left or right)
- 2009-07-27 15:54:00下载
- 积分：1
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DE2_70_TV
de2 70 开发板的演示程序，verilog语言编写，视频输入输出(de2 70 development board demo program, verilog language written, video input and output)
- 2013-04-09 19:29:51下载
- 积分：1
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Continuous_delay_control_Farrow
matlab代码，利用Farrow结构设计分数延时滤波器，滤波器阶数和个数可分别进行设置，利用最大最小准则近似(Matlab code, using Farrow structure design fractional delay filter, filter order and number can be set separately, using the maximum and minimum criterion approximation.)
- 2019-06-14 09:10:59下载
- 积分：1
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10_rom_test
说明： 介绍如何使用 FPGA 内部的 ROM 以及程序对该 ROM 的数据读操作。(This paper introduces how to use the ROM inside the FPGA and how to read the data of the ROM by the program.)
- 2019-03-30 16:39:57下载
- 积分：1
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src
yuv444 与yuv422相互转换verilog语言(yuv444 to yuv422)
- 2021-01-20 14:38:41下载
- 积分：1
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29_ad9226_test
用Verilog编写ad_9866的相应程序，在FPGA上实现相应功能(The corresponding program of ad_9866 is written with Verilog, and the corresponding functions are realized on the FPGA.)
- 2019-06-24 16:43:27下载
- 积分：1
