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sdram controller vhdl
sdram controller vhdl
- 2022-03-11 14:56:59下载
- 积分：1
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XAPP_585
XAPP585 serdes_1_to_7 and serdes_7_to_1 data
- 2021-02-04 13:49:57下载
- 积分：1
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multifre
说明： 资料的内容是实现旋转机械同步整周期采样的数据采集系统相关文献资料，包括鉴相信号如何倍频，机械振动信号相位如何检测等的实现方法。(Information content is for rotating mechanical synchronization synchronous sampling data acquisition system-related documents, including the Kam-believe number to harmonic mechanical vibration signal phase to detection of realization.)
- 2010-04-26 15:56:20下载
- 积分：1
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Three
Three-input Majority Voter
-- The entity declaration is followed by three alternative architectures which achieve the same functionality in different ways.
-Three-input Majority Voter -- The entity declaration is followed by three alternative architectures which achieve the same functionality in different ways.
- 2022-08-12 06:51:37下载
- 积分：1
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电子设计大赛作品_音频信号分析仪的FPGA源码(一等奖)
电子设计大赛作品_音频信号分析仪的FPGA源码(一等奖)-Electronic Design Competition works _ audio signal source analyzer FPGA (first prize)
- 2022-05-27 13:15:23下载
- 积分：1
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FifoinFIFO
systemc实现的一个fifo，对想要学习systemc的同学很有帮助哦(A fifo systemc achieved, the students want to learn systemc helpful oh)
- 2021-04-18 00:28:52下载
- 积分：1
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mun_base
adfvff f fdfs f dvdsz dz vdzsvd hdfdgvaz
- 2019-03-28 07:33:03下载
- 积分：1
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VHDL prepared by the FIR filter source for Embedded designers have a good role i...
VHDL语言编写的FIR滤波器源码
对于嵌入式设计者有很好的指导作用
-VHDL prepared by the FIR filter source for Embedded designers have a good role in guiding
- 2022-06-17 20:08:46下载
- 积分：1
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reference
早迟门（early late gate），比特同步算法，该文档详细的说明了早迟门算法的原理以及具体的实现步骤(Early late gate (early late gate), bit synchronization algorithm, the document explains in detail the principles of early-late gate method and the specific implementation steps)
- 2015-04-30 15:06:04下载
- 积分：1
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verilog实现基于i2s协议接口 i2s_interface
verilog实现基于i2s协议接口，在fpga上验证通过。(Verilog implements the interface based on I2S protocol and verifies it on fpga.)
- 2017-11-05 17:26:39下载
- 积分：1
