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串uart的vhdl，verilog，lattic实现原码
里面有四个文件,分别UART 源码 (lattice version)uart 源码 (Veri...
串uart的vhdl，verilog，lattic实现原码
里面有四个文件,分别UART 源码 (lattice version)uart 源码 (Verilog)uart 源码 (VHDL)uart16550.tar-uart series of vhdl and verilog. lattic achieve the original code, there are four documents, Source respectively UART (lattice version) uart source (Verilog) uart source (VHDL) uart16550.tar
- 2022-04-12 23:45:53下载
- 积分：1
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主要是RS
主要是RS-232串行接口技术并且通过了串行收发器UART的开发实例演示了接口设计的基本步骤程序-Is RS-232 serial interface technology and, through a serial UART transceiver development of interface design examples demonstrate the basic steps of the procedure
- 2022-03-17 15:36:56下载
- 积分：1
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跑马灯
跑马灯-是移位寄存器 有6个灯，无延时entity-Bomadeng-shift register is a six lights, without delay entity
- 2022-09-29 01:55:03下载
- 积分：1
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计算机组成原理课设
计算机组成原理课程设计代码，课程设计，计组(Computer organization principle curriculum design code, curriculum design, group calculation)
- 2018-10-31 22:26:09下载
- 积分：1
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This is the FPGA, a simple routine, LED keyboard display program, very time we s...
这是FPGA的一个简单例程，LED键盘显示程序，非常时候大家入门学习-This is the FPGA, a simple routine, LED keyboard display program, very time we started to learn
- 2022-06-18 21:18:24下载
- 积分：1
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counter
说明： 基于fpga的计数器模块 分频 可移植 完美实现(Perfect realization of frequency division and portability of counter module based on FPGA)
- 2020-06-20 21:00:01下载
- 积分：1
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chuankou_huihuan
说明： FPGA与PC端实现串口数据的收发，先从PC端接收数据，然后发回给电脑，可通过串口助手验证。(The serial port data is sent and received between the FPGA and the PC. First, the data is received from the PC, and then sent back to the computer. It can be verified by the serial port assistant.)
- 2020-06-16 10:20:01下载
- 积分：1
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自适应均衡器
自适应均衡器
- 2022-07-13 15:30:18下载
- 积分：1
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DW8051单片机的设计，用HDL设计，详细的HDL设计
DW8051单片机的设计，用HDL设计，详细的HDL设计-DW8051 microcontroller design, HDL design, detailed design of the HDL
- 2023-03-12 10:35:03下载
- 积分：1
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tiny-dnn-1.0.0a2
在zedboard上运行的神经网络架构，方便移植。(Run lenet-5 on zedboard)
- 2020-06-23 19:00:02下载
- 积分：1
