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mypro_synfifo
基于IP核RAM的同步fifo设计，工程使用Xilinx的开发软件ISE(RAM-based synchronization fifo IP core design, engineering, software development using Xilinx ISE)
- 2020-09-22 01:27:56下载
- 积分：1
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异步FIFO的设计 包括testbench 已调试成功
异步FIFO的设计 包括testbench 已调试成功-Asynchronous FIFO design includes testbench debug success has been
- 2023-04-13 19:40:03下载
- 积分：1
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在MAXPLUSII下实现BOOTH算法，可以进行任意位K×K的乘法
在MAXPLUSII下实现BOOTH算法，可以进行任意位K×K的乘法-BOOTH algorthim implemented in the MAXPLUSII environment, which can carry out arbitrary bits multiplication.
- 2022-05-08 13:11:29下载
- 积分：1
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6_ImageBasic
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像基本操作,几何变换,直方图,灰度化处理等(System Generator based image processing engineering, multimedia processing FPGA implementation source code, the basic operation of the image, geometric transformations, histogram, gray processing)
- 2020-10-20 20:07:24下载
- 积分：1
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MCU and FPGA communication functions: SCM control FPGA to write a byte of data...
单片机与ＦＰＧＡ的通信
功能 :单片机控制写FPGA一字节数据
单片机控制写FPGA一字节数据时钟 (注意读写数据端口可复用,也可分用)
单片机控制发送数据端口
-MCU and FPGA communication functions: SCM control FPGA to write a byte of data SCM control FPGA to write a byte of data clock (Note that the read and write data ports can be re-used, but also can be divided into use) SCM control to send data port
- 2023-04-21 07:05:03下载
- 积分：1
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电子表，实现计时记分计秒的功能，同时可以对时分秒进行校正，实现调时功能。...
电子表，实现计时记分计秒的功能，同时可以对时分秒进行校正，实现调时功能。-Electronic watches, time points of dollars to achieve a second function, at the same time when the minutes and seconds can be calibrated to achieve when the transfer function.
- 2022-06-03 13:45:21下载
- 积分：1
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托马斯的教科书Verilog。Verilog的托马斯在该领域的著名…
Thomas课本中的verilog例子。Thomas的verilog在可编程期间领域很有名-Thomas textbook example of verilog. Verilog Thomas in the field during the famous programmable
- 2022-03-07 05:06:40下载
- 积分：1
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-双路高速AD(AD9226)模块板发行资料
其中包括AD9226的原理图和应用程序，可以参考完成其他编程(Including AD9226 schematics and applications, you can refer to complete other programming)
- 2020-12-06 21:09:21下载
- 积分：1
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a2
说明： 用MATLAB设计及FPGA实现IIR滤波器的方法
摘要 本文介绍了IIR数字滤波器的传统设计思想与步骤及计算机辅助设计方法。并在FPGA上高效实现的低阶IIR滤波
器，其阶数低，实时响应快，适合雷达等的实时、高效处理环境。利用IIR滤波器的多相结构来实现该滤波器系统的方法，对于
四通道的情形在MATLAB上利用Simulink作了仿真, 并在目标板上对算法进行了实现,证明该系统能够同时处理四个通道的信号。(Using MATLAB Design and FPGA realization IIR Filter method Abstract This paper introduces IIR digital filter traditional design Thought and steps and CAD method. And FPGA on efficient realization low IIR filter, its order low, real response fast suitable radar real time, efficient processing environment. Use IIR filter multiphase structure realize the filter systematic method, for four channel circumstances in MATLAB on use Simulink made simulation and target board algorithm was realized proved system can simultaneously four channel signal.)
- 2010-04-01 17:10:21下载
- 积分：1
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binary LDPC DECODER
二进制LDPC解码器：
- 2022-05-31 06:59:45下载
- 积分：1
