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M_M
此为数学形态滤波器消燥的代码,用于一维信号,涉及一个具体的例子,需要的话可以自己修改,修改相应的结构元素。(This is a mathematical morphology filter away dry code, used to one dimensional signal, involving a concrete example, necessary can change ourselves, change the structure of the corresponding elements)
- 2013-08-29 21:36:37下载
- 积分:1
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alu3
用verilog语言编写,一个8-bit ALU,可以完成按字节的+、-和与、或、非操作(Using Verilog language, an 8-bit ALU, to be completed by byte+,- And, or, non-operating)
- 2008-05-12 12:48:49下载
- 积分:1
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Lab1_flash_led
说明: EGO_1流水灯显示代码步骤过程全都有适合初学者练手(EGO_1 nxoiaocijpwjcpoewopvkpowevko)
- 2020-12-22 11:39:08下载
- 积分:1
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ecc算法源码
该源码表述了ecc算法如何用vhdl实现RSA(Ron Rivest,Adi Shamir,Len Adleman三位天才的名字)一样,ECC(Elliptic Curves Cryptography,椭圆曲线密码编码学)也属于公开密钥算
- 2022-03-07 00:08:00下载
- 积分:1
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adding
加法器,输入两个整数,用电路图形式将其逻辑原理呈现出来,该加法器为8位运算,每一位都对应一张电路图,可展示其完整过程(Adder, input two integer, with circuit diagram form its logical principle appear, this adder is 8 bit arithmetic, each corresponding to a circuit diagram, can show the complete process)
- 2012-11-19 13:54:32下载
- 积分:1
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sm4_Verilog
sm4 VERILOG 代码实现及其在无线网络3G中的应用(sm4 VERILOG)
- 2020-08-11 20:58:27下载
- 积分:1
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用VHDL编写的计算器,能实现简单的加减乘除四则运算
用VHDL编写的计算器,能实现简单的加减乘除四则运算
- 2022-03-18 17:26:25下载
- 积分:1
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用VHDL语言实现的ARM处理器的标准内核的源代码程序,可在重用...
用VHDL语言实现的ARM处理器的标准内核的源代码程序,可在重用-use of the VHDL standard ARM processor core source code procedures, the reuse
- 2023-06-17 04:15:04下载
- 积分:1
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学习Xilinx公司开发软件ISE的基础资料,从最基础到复杂逻辑设计。
学习Xilinx公司开发软件ISE的基础资料,从最基础到复杂逻辑设计。-Learning Xilinx software ISE developed the basis of information from the most basic to complex logic design.
- 2022-05-27 10:26:09下载
- 积分:1
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dowload from : www.fpga.com.cn
-- Moore State Machine with explicit state encoding
-- dowload from: www.fpga.com.cn & www.pld.com.cn--- Moore State Machine with explicit state encoding-- dowload from : www.fpga.com.cn
- 2022-04-23 20:22:54下载
- 积分:1