-
vhdl学习方法,含有大量的vhdl源代码,对vhdl的语法的介绍
vhdl学习方法,含有大量的vhdl源代码,对vhdl的语法的介绍-VHDL source习laugh Yang, Yi bleed at the nose cavity submerged stresses measured tungsten Daitou VHDL, VHDL-Qin Pang Yang cavity cavity Geng Zhuang
- 2023-07-17 16:40:03下载
- 积分:1
-
01_基于ZYNQ的FPGA基础入门
VIVADO SOC 使用文档 基于zynq 7020(vivado soc example text of zynq)
- 2020-06-17 12:00:01下载
- 积分:1
-
PWM
基于FPGA的PWM控制器设计,包含ADC0820模块,按键扫描,PID,PWM控制器等模块,VHDL语言完成,已仿真通过(PWM controller design based on FPGA, including ADC0820 module, key scan, PID, PWM controllers and other modules, VHDL language completed, through simulation)
- 2016-05-01 15:05:58下载
- 积分:1
-
Digital stopwatch in the stopwatch with start, reset, suspend, suspended after t...
数字跑表
该跑表具有启动、复位、暂停、暂停后继续计时等功能
能显示的秒计数时间精确到小数点后第二位,即能显示**.**s
按钮设置防抖-Digital stopwatch in the stopwatch with start, reset, suspend, suspended after the time and other functions can show the seconds counting time accurate to the second place after the decimal point, that can show**.** s Anti-Shake button settings
- 2022-01-21 20:07:05下载
- 积分:1
-
liyuanlnx_IP_PLL
FPGA锁相环实验:
顶层文件加底层IP文件构成
top中例化ip核pll(Experiment of Phase-Locked Loop Based on FPGA)
- 2020-06-22 04:00:01下载
- 积分:1
-
DDR SDRAM information, interested to see friends down under
DDR SDRAM的资料,有兴趣的朋友可以下下来-DDR SDRAM information, interested to see friends down under
- 2022-07-22 04:07:30下载
- 积分:1
-
VHDL的四选一选择器
VHDL的四选一选择器-VHDL four elected a selector
- 2022-03-04 19:05:14下载
- 积分:1
-
基于VHDL的点阵控制
1、固定红色显示一个汉字或图形,显示亮度4 级可调,用一个btn 按钮实现亮度调节,亮度变化视觉效果要尽量明显。2、用从红到绿 8 级渐变色显示一个固定汉字或图形。3、分别用单字循环显示、左右滚动显示、上下滚动显示三种显示方式单色显示四个汉字或图形,显示过程中,显示方式用一个btn 按键进行切换。4、显示的图形或汉字要尽量饱满美观。
- 2022-04-27 08:32:36下载
- 积分:1
-
am
基于FPGA的用verilog语言写的,改程序可产生不同调制系数和不同频率的AM波,长按按键切换调制度25 、50 、75 和短按按键切换调制信号频率1k、1.5k、2k、2.5k.(Based on the FPGA using verilog language, change the program can produce different coefficients and different frequency modulated AM wave, long press the button to switch the modulation of 25 , 50 , 75 and short press button to switch the modulation signal frequency 1k, 1.5k, 2k, 2.5k.)
- 2013-10-14 22:14:56下载
- 积分:1
-
fft_8
基二8点fftverilog实现。经过modelsim仿真通过(Base 2 fftverilog implementation at 8 o clock. Go through the modelsim simulation)
- 2021-02-21 16:49:42下载
- 积分:1