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ddr3_wr_ctr
说明: 用verilog编写的ddr3芯片读写控制程序,经过调试的,可以直接拷贝。已在Xilinx Spartan6 FPGA调试验证。(The ddr3 chip read-write control program written in verilog can be copied directly after debugging. Tested and verified on Xilinx Spartan6 FPGA.)
- 2020-03-16 10:12:40下载
- 积分:1
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add_verilog
2位全加器,实现全加器的功能,有近位的加法,输出也有近位,还有testbench,进行验证,验证通过(Two full adders, to achieve full adder function, nearly bit adder, there are nearly bit output)
- 2014-05-14 18:56:33下载
- 积分:1
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sobel_filter_zx1809_v10
说明: 图像边缘检测,图像中值滤波和MATLAB处理(Digital Image processing based on FPGA)
- 2019-05-22 13:46:59下载
- 积分:1
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awb
实现相机采集数据的自动白平衡功能,采用verilog语言编写。(The automatic white balance function of camera data acquisition is realized)
- 2017-09-19 17:45:55下载
- 积分:1
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spi_interface
说明: spi通用串行总线,4线控制,可读写操作(SPI universal serial bus, 4-wire control, readable and writable operation)
- 2019-04-29 12:37:55下载
- 积分:1
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基于verilog的LU分解LUdecompose
基于verilog的LU分解,本文件包括详细的程序代码,运行文件,以及详细的文档(LU decompose based on verilog)
- 2020-07-07 12:58:57下载
- 积分:1
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shuzizhongsheji
有用的数字钟设计文档,有秒表、闹钟等模块,希望对大家有用!(JUST LEARN FROM IT!!ENJOY!)
- 2013-07-18 11:02:24下载
- 积分:1
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LS-versus-MMSE
这是基于MIMO-OFDM的同步算法研究的源程序。本程序采用的极大似然估计的方法。(This is based on MIMO-OFDM synchronization algorithm source code. The program uses the method of maximum likelihood estimates.
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- 2012-12-13 15:32:49下载
- 积分:1
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random_num_gen
通过随机数产生原理进行verilog编程,从而实现FPGA的随机数产生(Through random number generation principle for Verilog programming, so as to achieve the FPGA random number generation)
- 2017-07-08 11:55:41下载
- 积分:1
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hand_shake
握手程序,可以完美实现跨时钟域的数据传输(handshake and testbench,verilog HDL)
- 2011-11-22 21:05:38下载
- 积分:1