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ZBT SRAM controller reference design for Xilinx VHDL source code
ZBT SRAM控制器参考设计，xilinx提供的VHDL源代码-ZBT SRAM controller reference design for Xilinx VHDL source code
- 2023-02-16 08:00:04下载
- 积分：1
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用VHDL语言编写的代码，以供大家学习和交流，方便大家学习！...
用VHDL语言编写的代码，以供大家学习和交流，方便大家学习！-prepared using VHDL code for all to study and exchange to facilitate learning!
- 2023-01-23 12:20:04下载
- 积分：1
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alpha011410
Firmware setopbox Ali3329B
- 2016-04-03 19:16:28下载
- 积分：1
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8.25
改写四号中断的 自己编的，，，，，，求过啊！！！一个很简单的小程序(Rewrite the fourth interruption of their series,,,,,, begged ah! ! ! A very simple little program)
- 2013-12-16 20:46:33下载
- 积分：1
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8BIT_CPU
一个8位的CPU设计，用verilog语言写的，希望有用(A CPU OF 8 BITS
)
- 2020-07-01 09:00:02下载
- 积分：1
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8位大小比较器的VHDL源代码，Magnitude Comparator
VHDL description of a 4...
8位大小比较器的VHDL源代码，Magnitude Comparator
VHDL description of a 4-bit magnitude comparator with expansion inputs-eight compared with the size of the VHDL source code, Magnitude Comparator VHDL description of a 4-bit magnitude comparator inputs with expansion
- 2023-07-28 13:55:03下载
- 积分：1
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pj2-NO.6
基于FPGA的电子密码锁设计-已在开发板上成功运行，通过老师检验。(FPGA based electronic password lock design- has been successfully developed on the development board, through the teacher inspection.)
- 2017-05-26 11:54:44下载
- 积分：1
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CC
说明： quartus 的一个实例,希望对刚刚学习quartus 的人有点帮助(Quartus an example, in the hope that people just learning a little help Quartus)
- 2008-04-09 14:41:36下载
- 积分：1
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32bit_multiply
包含32为乘法器的设计，用verilog语言实现，包括booth编码的实现，booth乘法器的实现，3_2压缩器的实现，4_2压缩器的实现，华伦斯树的实现，以及两个testbench文件用于测试。(Contains 32 multiplier design, verilog language, including booth encoding implementations, booth multiplier implementations, 3_2 compressor implementation 4_2 compressor to achieve and realize China Clarence tree, and two testbench file with the to the test.)
- 2015-01-18 21:20:48下载
- 积分：1
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完成的是RS422信号的计数功能，并产生一定的触发信号
完成的是RS422信号的计数功能，并产生一定的触发信号-RS422 signals the completion of the count function, and produce a certain trigger signals
- 2022-04-14 14:08:50下载
- 积分：1
