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MP3-coder
In this design, it is assumed that a buffer sized as 1024x8 bits provides main data including scale factors and Huffman code bits to Huffman decoder.
Also, it is assumed that a memory with 1024x8 bits is ready for each component to write or read the output or input 576 frequency lines.(This folder contains three directories: Huffman, IMDCT and Filterbank, each of them
includes all the VHDL source codes of the component.)
- 2013-08-06 15:40:24下载
- 积分：1
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using VHDL prepared by the LED display driver circuit design source
用VHDL语言编写的LED显示器驱动电路的设计源程序-using VHDL prepared by the LED display driver circuit design source
- 2023-07-22 14:55:03下载
- 积分：1
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procedures major hardware description language (VHDL) to achieve : MCU and FPGA...
程序主要用硬件描述语言（VHDL）实现：
单片机与FPGA接口通信的问题-procedures major hardware description language (VHDL) to achieve : MCU and FPGA interface communication problems
- 2022-02-12 01:14:15下载
- 积分：1
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VHDL显示六位学好
在八位七段数码显示管上显示8位学号，要显示的学号可以在程序内改，经设备验证无错误，且运行良好。
- 2022-05-30 18:34:23下载
- 积分：1
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xilinx_edk_9.2_crack
xilinx edk 9.2 破解器/注册机(xilinx edk 9.2 crack)
- 2021-03-29 15:09:10下载
- 积分：1
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fifo
说明： 用FPGA完成256*8的存储器的读写操作( complete reading and writing 256* 8 memory with FPGA )
- 2010-04-24 17:07:06下载
- 积分：1
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yiweijicunq
16位右移位寄存器
下面描述的是一个位宽为16位的右移位寄存器，实际具有环形移位的功能，是在右移位寄存器的基础上将最低位的输出端接到最高位的输入端构成的。其功能为当时钟上升沿到达时，输入信号的最低位移位到最高位，其余各位依次向右移动一位。(16-bit right shift register
The following description is a right shift register with a bit width of 16 bits. It actually has the function of circular shift. It is based on the right shift register, which connects the lowest bit output terminal to the highest bit input terminal. Its function is that when the rising edge of the clock arrives, the lowest displacement of the input signal reaches the highest position, and the rest of you move one bit to the right in turn.)
- 2020-08-18 09:58:21下载
- 积分：1
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用VHDL语言编程完成数码管0
用VHDL语言编程完成数码管0-255数字的显示-VHDL language programming with the 0-255 number to complete the display of the digital control
- 2023-04-25 03:25:03下载
- 积分：1
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part1
Altera DE2 开发板试验2 第1部分VHDL答案(Altera DE2 Lab2 part1 VHDL answer)
- 2011-11-17 19:02:19下载
- 积分：1
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WigglerJTAG
Wiggler Clone .JTAG Schematic and PCB in Altium Designer Format
- 2009-07-17 19:27:27下载
- 积分：1
