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LCD1602-TEST
利用verilog驱动LCD1602
本实验是用LCD1602显示英文。(LCD带字库)(//Use verilog driver LCD1602// video tutorial for all of us 21EDA e-learning board// The experiment is LCD1602 display in English. (LCD with font))
- 2013-12-16 13:51:35下载
- 积分:1
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It s a 8051 VHDL source code issued by Original.
它是一个8051 VHDL源代码发布的原创。
- 2022-06-17 06:19:21下载
- 积分:1
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8 位修改 Booth 型乘法器
这是基数 4 修改 Booth 型乘法器为 8 位。它可以用于任何大小的操作数的乘法......
- 2022-01-24 13:25:05下载
- 积分:1
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fpga clock design, the information is better, for your reference, non
fpga clock 设计,资料较好,供大家参考,非商用目的哦-fpga clock design, the information is better, for your reference, non-commercial purposes Oh
- 2022-10-20 15:50:02下载
- 积分:1
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MODELSIM的实验程序,在QUARTUSii中调用MODELSIM,实现仿真
MODELSIM的实验程序,在QUARTUSii中调用MODELSIM,实现仿真-ModelSim Experimental procedures QUARTUSii call MODELSIM, realize Simulation
- 2022-04-13 16:01:45下载
- 积分:1
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DDS FPGA开发下的verilog源代码
DDS_AD9854_for FPGA ,FPGA开发下的verilog源代码,信号发生器(DDS_AD9854_for FPGA, verilog source code, signal generator.)
- 2013-01-14 00:13:36下载
- 积分:1
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Self-study-syllabus-VSC-HVDC
Syllabus for VSC-HVDC course
- 2012-08-24 12:49:16下载
- 积分:1
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demo_as32ttl1w
可以获取各种字符,并在数码管显示出来,非常的靠谱且稳定(Various characters can be acquired and displayed on the digital tube.)
- 2020-06-16 15:00:02下载
- 积分:1
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用状态机对A/D转换器0809的采样控制电路的实现。工具:Quartus ii 6.0 语言:VHDL...
用状态机对A/D转换器0809的采样控制电路的实现。工具:Quartus ii 6.0 语言:VHDL-State machine used for A/D converter sampling control circuit 0809 is achieved. Tools: Quartus ii 6.0 Language: VHDL
- 2022-05-14 13:34:13下载
- 积分:1
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LCD12864
verilog lcd2864 适合初学者(verilog lcd2864 )
- 2013-10-15 18:57:45下载
- 积分:1