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我是VHDL的初学者，这是我自己编译的简单的几个VHDL码，功能有3...
我是VHDL的初学者，这是我自己编译的简单的几个VHDL码，功能有3-8解码器及其testbench,16位寄存器及其testbench和交通灯。
希望能和其他初学者一起讨论学习，并得到高手的指点-I VHDL beginners, this is my own translation of a few simple VHDL code. 3-8 function decoder and testbench, 16 Register and testbench and traffic lights. Hopes to be able to discuss other beginners learning, and with the guidance of the master
- 2022-05-14 07:13:44下载
- 积分：1
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THS1206
FPGA来实现数据采集，AD采用TI公司的THS1206，高速并行AD，内含16字FIFO，降低硬件复杂度。(FPGA to realize data acquisition, AD using TI company s THS1206, high-speed parallel AD, containing the 16-character FIFO, to reduce hardware complexity.)
- 2009-07-09 09:08:27下载
- 积分：1
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uart
实现与电脑端串行数据发送与接收，波特率为9600(Realize serial data sending and receiving with the computer terminal)
- 2017-10-04 01:30:01下载
- 积分：1
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8位十六进制频率计设计 根据频率的定义和频率测量的基本原理，测定信号的频率必须有一个脉宽为1s的输入信号脉冲计数允许信号；1s计数结束后，计数值被锁入锁存器，计...
8位十六进制频率计设计 根据频率的定义和频率测量的基本原理，测定信号的频率必须有一个脉宽为1s的输入信号脉冲计数允许信号；1s计数结束后，计数值被锁入锁存器，计数器清零，为下一测频计数周期做好准备。测频控制信号可由一个独立的发生器（FTCTRL）来产生。-8-bit hexadecimal Cymometer designed in accordance with the definition of frequency and frequency of the basic principles of measurement to determine the frequency of the signal must have a pulse width of the input signal for 1s permit pulse counting signal 1s counting after the total value was locked into the lock depositors, counters cleared for the next count cycle frequency measurement ready. Frequency control signal generator may be an independent (FTCTRL) to generate.
- 2022-06-19 17:20:21下载
- 积分：1
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SinglePeriodCPU
说明： verilog语言书写，单周期CPU源码(single period CPU)
- 2020-11-25 11:59:32下载
- 积分：1
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zw222
ZardWars Files
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- 2014-03-20 01:43:16下载
- 积分：1
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RGB_Driver
串口收发程序，成功通过仿真，可以用来学习(Serial transceiver,It is successful through simulation and can be used to learn)
- 2020-10-28 14:00:00下载
- 积分：1
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1553B总线接口技术研究及FPGA实现
说明： 基于FPGA的1553b接口设计详细设计论文(1553B design based on FPGA)
- 2019-04-18 11:02:52下载
- 积分：1
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A complete viterbi coding procedures, the use of VHDL language, as well as test...
一个完整的viterbi编码程序，使用vhdl语言编写，还有测试程序-A complete viterbi coding procedures, the use of VHDL language, as well as test procedures
- 2022-04-12 08:34:41下载
- 积分：1
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LCD_VHDL
用FPGA控制1602型液晶显示，显示一行英文语句。(show)
- 2009-09-20 23:14:54下载
- 积分：1
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