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视频测试图形发生器
应用背景关键技术Altera FPGA ;CIII,Cyclone III implemented.16灰度320x240流视频信号发生器。
- 2022-03-05 02:38:57下载
- 积分:1
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Mult_Frequency
Based on the verilog such as frequency meter accuracy, except for measuring frequency can also measure pulse width of empty measure than 32 counts of data through the simulation SPI serial output to SCM processing and display
- 2011-07-27 10:26:29下载
- 积分:1
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一款商用ADC的verilog
商用可综合adc,分辨率为16位,内含一个时序检查功能,可供对ADC感兴趣的人有帮助。尤其是需要一个ADC模型的可以使用
- 2022-01-25 22:47:37下载
- 积分:1
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shape
基于FPGA的成型滤波器的代码,里面内附激励文件,使用verilog编写(FPGA-based shaping filter code, which included incentives files using verilog write)
- 2014-06-05 16:52:06下载
- 积分:1
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StepMotor_CurrentLoop
实现二项混合式步进电机的驱动,和步进电机的细分程序。(The driving of binomial hybrid stepper motor and the subdivision program of stepper motor are realized.)
- 2020-06-21 02:20:01下载
- 积分:1
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tb_time_offfset
说明: offset_cancellation code for matlab to hdl
- 2020-06-17 12:20:02下载
- 积分:1
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I2C_code
与IP核配套的I2C-Master Core,包含了目前主流FPGA芯片的I2C实现,代码包括Altera/Xilinx/OpenCore等公司的VHDL/Verilog/C等。(I2C-Master Core)
- 2010-05-22 22:12:26下载
- 积分:1
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rs_encoder
RS编码器的fpga实现,有TESTBench(RS encoder to achieve the fpga, and TESTBench)
- 2009-06-24 11:37:04下载
- 积分:1
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spwm
关于SPWM调制设计VHDL代码
关于SPWM调制设计VHDL代码(SPWM modulation on the design of VHDL code design on the VHDL code modulation SPWM)
- 2021-03-16 09:19:22下载
- 积分:1
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ArhivaAdrian
Anticipated Adder for Xilinx
- 2011-11-15 06:57:02下载
- 积分:1