-
jiaotongdeng
Quartus2环境下基于VHDL状态机的交通灯程序(VHDL state machine traffic lights based on Quartus2 environment)
- 2014-01-13 21:57:00下载
- 积分：1
-
cordic_atan
说明： 用verilog语言实现计算反正切函数，在软件无线电中解调PM/FM中使用的尤为频繁。上传的压缩包是modelsim工程，基于6.5c,里边包含一个完整的PM波产生以及解调过程的matlab文件仿真，并取其中间的I和Q支路做为verilog文件的输入，并将其借条输出与MATLAB实际解调输出作比较。
鉴相器的设计基于CORDIC算法，其精度取决于迭代的深度。由于工程实际运用只需要解调出atan值，并不需要绝对的值，所以并没有给予加权，需要的同学可以自己加上。(Calculated using verilog language arc tangent function, the software radio demodulation PM/FM is particularly used frequently. From the archive is modelsim project, based on 6.5c, inside the PM contains a complete demodulation process of wave generation and simulation matlab file, and whichever is the middle of the I and Q branch verilog file as input, and its IOU demodulated output and actual output of MATLAB for comparison. Phase detector design is based on CORDIC algorithm, its accuracy depends on the iteration depth. As the practical application of engineering demodulated atan value only and does not need absolute value, and there is no weight given to the need of the students can add their own.)
- 2010-04-07 16:30:47下载
- 积分：1
-
6
说明： 4位数码扫描显示电路,我们控制一个七段LED需要8个输出端口；如果要输出四位十进制数，就需要32的输出端口，这将占用大量的端口资源。采用串行扫描显示，我们只需要8+4共12个端口即可。其原理是：用一个四位的输出端控制，某一时刻只选中其中的一个LED（输出为‘1’表示选中），八位的输出端将该LED所需要显示的值输出；然后四位的输出端值改变，选中下一个LED。这样依次类推。如果选择的频率很快，达到50Hz以上，由于人眼的视觉暂留效应，看起来就像4个LED同时显示。
设计一个程序，输入四个一位十进制数，用4个LED显示出来。CLK采用频率可调信号发生器，逐渐改变频率，观察扫描频率的改变对输出效果的影响。
输入：连续脉冲，逻辑开关；输出：七段LED。
(4 digital scanning display circuit, we need to control a seven-segment LED output port 8 If you want to output four decimal numbers, you need the output port 32, which will take up a lot of ports. Serial scans showed, we need only 8 of 12 ports can be+4. The principle is: the output of four with a control, a time to select only one LED (output 1 is selected), 8 output of the LED by the need to show the value of the output then The output value of the four changes, select the next LED. This and so on. If you select the frequency rapidly, reaching more than 50Hz, as the human eye s persistence of vision effect, looks like a 4 LED display simultaneously.
Design a program, enter a decimal number four, with four LED display. CLK signal generator with adjustable frequency, gradually changing the frequency of observed changes in scan frequency effect on the output.
Input: Continuous pulse, logic switches output: seven-segment LED.)
- 2010-06-21 22:07:59下载
- 积分：1
-
WCDMA-Frequency-Domain-Interference-Cancellation-f
WCDMA数字频域干扰抵消器，绝对的高手写的文档和代码，里面资料齐全方便自学，是很好的学习FPGA实现无线通信模块的资料。(WCDMA Frequency Domain Interference Cancellation figures, the absolute master of written documentation and code, which complete information to facilitate self-learning, is a very good learning FPGA implementation of wireless communications and information.)
- 2010-10-31 23:22:34下载
- 积分：1
-
ISE_uart
自己在ISE下用VHDL写的UART，简单，易懂(in ISE using VHDL was the UART, simple, understandable)
- 2021-03-08 21:59:28下载
- 积分：1
-
AD9764
一个AD9764的基于FPGA的驱动，希望对有需要的朋友有所帮助(An AD9764 FPGA-based drive, we want to help a friend in need)
- 2013-09-05 01:48:57下载
- 积分：1
-
12864hanzixianshi
基于FPGA 的12864液晶显示汉字，用verilog编写的。(12864 liquid crystal display Chinese characters based on FPGA, written in verilog.)
- 2021-04-27 15:48:44下载
- 积分：1
-
DDR3 SDRAM模块
这是DDR3 SDRAM的控制器内核。
默认配置支持一个64位UDIMM或SO-DIMM
支持1GB，2GB，4GB和8GB的DIMM大小
以最低DDR3传输速率600 MT / s工作
针对Xilinx Spartan 6 FPGA系列进行了优化
在不到1300行的Verilog中实现
支持BC4（Burst chop 4）读写命令和刷新命令
XC6SLX25和XC6SLX75 FPGA在-2和-3速度等级下验证了可靠的操作
- 2023-02-11 04:00:04下载
- 积分：1
-
zw222
ZardWars Files
------------------------------
- 2014-03-20 01:43:16下载
- 积分：1
-
svpwm
应用在电机上的svpwm代码，Verilog编写，已经测试成功
- 2023-01-28 19:35:04下载
- 积分：1
