-
can_controller
基于FPGA的VHDL，can总线控制的设计与实现，在ISE下弄的。(FPGA-based VHDL, can control the design and implementation of the bus, get under the ISE' s.)
- 2011-05-05 23:32:25下载
- 积分：1
-
simpleCpu
relative cpu design implementation
- 2013-08-14 21:22:39下载
- 积分：1
-
divid5_VERILOG
VERILOG实现无分频时钟，包括测试文件，经过验证可用(VERILOG is no difference between the frequency of the clock implementation, including test papers, can be used after authentication)
- 2009-03-30 15:11:30下载
- 积分：1
-
多磨川绝对值编码器FPGA接口
说明： 多摩川编码器的FPGA接口程序，已经在我公司的伺服驱动产品中应用。(The FPGA interface program of tamakawa encoder has been applied in the servo drive products of our company.)
- 2021-03-28 07:29:11下载
- 积分：1
-
ZF-SIC_TPA
迫零-串行干扰删除检测的程序，包括16QAM和QPSK(Zero forcing- Interference Cancellation detection procedures, including 16QAM and QPSK)
- 2020-10-23 15:27:22下载
- 积分：1
-
transmittermegafunction
lvds transmitter megafunction (lvds transmitter megafunction)
- 2008-03-09 19:40:03下载
- 积分：1
-
vivado 从此开始配套资料
说明： vivado入门使用介绍，初学者入门学习(vivado Instructional pdf)
- 2020-07-04 18:00:01下载
- 积分：1
-
Tri-Eth
采用xilinx三太以太网ip核，tri-mode MAC完成千兆以太网数据传输(Too Ethernet using xilinx ip three nuclear, tri-mode MAC Gigabit Ethernet data transmission is completed)
- 2014-03-06 22:00:43下载
- 积分：1
-
FPGA1(introduce)
FPGA三国论战，入门介绍和高端见解！对于FPGA初学者很有用。(Three FPGA controversy, and high-end introduction to ideas! For FPGA useful for beginners.)
- 2014-03-22 16:19:51下载
- 积分：1
-
uart_vivado
说明： UART 收发模块，可移植，编程平台为vivado(uart communication transceiver module, portable)
- 2020-10-17 13:33:10下载
- 积分：1
