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fpga Verilong 实现以太网
在fpga下 ,完全用verilong编写的以太网程序,可以进行tcp/IP通信,请不要用在商业用途中,谢谢
- 2022-10-05 04:20:03下载
- 积分:1
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123
说明: 系统介绍了数字开发系统平台FPGA设计中的部分技巧 对于FPGA开发研究人员具有一定的指导和帮助意义(Systematic introduction of digital development platform FPGA design techniques for FPGA development of some of the researchers have some sense of guidance and help)
- 2011-03-24 10:34:07下载
- 积分:1
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Generate_4fsk
雷达信号产生4PSK简单脉冲信号很好用信号产生(Radar signal pulse signal generating 4PSK simple signal generating good)
- 2013-06-22 23:10:05下载
- 积分:1
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新建
MCP4725实现的i2c驱动程序,通过DA转换实现函数发生器(MCP4725 come ture i2c drive program,Through da conversion function generator in English)
- 2017-06-18 10:42:07下载
- 积分:1
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EAACK secure system
很好,我在做简化编码语言IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
- 2022-08-06 08:04:27下载
- 积分:1
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ad4003
AD4003的Verilog程序,验证有用(Verilog code for AD4003)
- 2020-08-24 08:18:16下载
- 积分:1
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SOUND_PLAY6
WM8731芯片的音效处理verilog代码,
WM8731芯片是音频ADCDAC芯片(WM8731 audio processing chip verilog code, WM8731 chip audio ADC DAC chip)
- 2013-12-14 14:12:10下载
- 积分:1
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cordic
16级流水线型cordic旋转代码以及测试文件,亲测好用(16-stage pipelined cordic rotation code and test files, pro-testing)
- 2019-03-09 08:59:01下载
- 积分:1
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dr6—ise-F
用FPGA开发板的按键作为电子表的时间初值设置控制信号,数码管当前时间值输出。用按键选择分别输出:分、秒、1/10秒。(With FPGA development board button, as the time value of the electronic table, set the control signal, digital tube current time value output. Select output by buttons: minutes, seconds, and 1/10 seconds.)
- 2017-10-11 21:19:55下载
- 积分:1
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water_light
Verilog语言的流水灯设计程序,对初学者很有用。(Water lights Verilog language design program useful for beginners.)
- 2015-03-15 13:48:43下载
- 积分:1