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tdma_code
tdma参数化模块。可以自动生成2的n次的tdma哥时隙,用户可根据需要自己配置参数(tdma see the number of model lumps. 2 n basis following manner tdma chance possible 以自 dynamic generation, for root needed self-placement see number)
- 2013-09-03 21:52:51下载
- 积分:1
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FPGA数字钟
基于xilinx公司的Basys2开发板开发的FPGA数字钟,实现了时钟、闹钟和秒表等功能,同时包含了测试程序。使用Verilog语言编写,开发软件为Xilinx ISE Design Suite 13.4。
- 2022-02-13 03:16:12下载
- 积分:1
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I2C_code
与IP核配套的I2C-Master Core,包含了目前主流FPGA芯片的I2C实现,代码包括Altera/Xilinx/OpenCore等公司的VHDL/Verilog/C等。(I2C-Master Core)
- 2010-05-22 22:12:26下载
- 积分:1
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FPGA 蜂鸣器
1. 蜂鸣器实验
(1) 频率设定
音乐来自震动,为了区别音调,需要有不同的震动频率。制作一个最底层的变频器,依据传入的分频值从100MHZ分频至相应音调的震动频率,将这一震荡信号接到蜂鸣器。
为了标志低中高
- 2022-02-13 05:59:25下载
- 积分:1
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C8051F340核心板资料包
C8051F340/1/2/3/4/5/6/7 全速 USB FLASH 微控制器(C8051F340/1/2/3/4/5/6/7 full speed USB FLASH microcontroller)
- 2017-07-24 09:41:26下载
- 积分:1
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Uart_Analysis
rs422通信,此模块实现通信功能,使用Verilog语言(RS422 communication program, Verilog language, this module implements 422 communication function.)
- 2021-03-23 16:29:15下载
- 积分:1
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随机计数的计数器Verilog代码
Verilog代码随机计数器计数的随机数,根据要求,
- 2023-06-09 08:45:03下载
- 积分:1
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vhdl1008
说明: PCI slave IP core, in VHDL language ,has been verified,it is very easy to use.
it is an ideal IP to study PCI,design PCI Bridge
- 2020-06-18 18:20:01下载
- 积分:1
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MP3-coder
In this design, it is assumed that a buffer sized as 1024x8 bits provides main data including scale factors and Huffman code bits to Huffman decoder.
Also, it is assumed that a memory with 1024x8 bits is ready for each component to write or read the output or input 576 frequency lines.(This folder contains three directories: Huffman, IMDCT and Filterbank, each of them
includes all the VHDL source codes of the component.)
- 2013-08-06 15:40:24下载
- 积分:1
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BT656_RGB
说明: 将BT656数据流转换成RGB图像格式的数据(Converting BT656 data stream into RGB image format)
- 2021-03-22 09:29:17下载
- 积分:1