-
usb接口系统设计实例
fpga usb接口系统设计实例,实现了usb通讯，控制相关器件完成高速数据采集，存储，数据处理。-fpga usb interface system design example, the realization of the usb communications, control-related devices to complete high-speed data acquisition, storage, data processing.
- 2022-04-28 05:44:11下载
- 积分：1
-
LDPC编译码
LDPC编译码，最新一代纠错码技术，自带校验矩阵，数据程序内带测试数据
- 2022-01-26 04:09:36下载
- 积分：1
-
adv7511_hdmi
FPGA与HDMI ADV7511接口源代码(FPGA HDMI Adv7511 interface)
- 2020-10-08 14:37:36下载
- 积分：1
-
traffic_light
完成交通灯的所有功能，已经通过验证。希望大家多多指教。(Completion of all the features of traffic lights, have been authenticated. Hope the exhibitions.)
- 2011-11-29 20:17:58下载
- 积分：1
-
HDB3
用Verilog HDL语言进行HDB3编码，并通过Quartus Ⅱ仿真验证(With the Verilog HDL language HDB3 coding, and simulation by Quartus Ⅱ)
- 2020-11-30 11:19:28下载
- 积分：1
-
QAM_FPGA
QAM调制，基于FPGA的实现，包含有乘法器模块、升降余弦滤波器模块、QAM序列生成模块(QAM modulator,the implementation based on FPGA,include MUL、FIRCOS and QAM generate)
- 2021-03-03 01:49:33下载
- 积分：1
-
cordic_verilog
cordic算法的verilog 语言实现，注释详细，资料齐全，实现了cordic算法的各个功能，可以计算正余弦(cordic algorithm verilog language, detailed notes, and complete information)
- 2020-06-29 16:20:02下载
- 积分：1
-
阿尔特拉 发动机控制器 示例
此应用描述了步进式发动机控制器， 你可以控制发动机
- 2022-10-07 09:00:03下载
- 积分：1
-
CfgDDS_9910
dds ad9910配置的verilog hdl程序，模块化设计，输入待配置的数据，字长，启动信号，即可自动产生时序，完成一次配置，模块还有done握手信号，方便用户调用时，反复多次配置。(dds ad9910 configuration verilog hdl program, modular design, the input data to be configured, word length, the start signal, the timing can be automatically generated, complete a configuration, the module has done handshake, user-friendly call, repeatedly configuration .)
- 2015-04-21 22:03:50下载
- 积分：1
-
CH372
USB设备接口的驱动程序，采用verilogHDL语言编写，并包含相关说明资料(USB device driver interface, using verilogHDL language, and contains descriptive information)
- 2014-01-03 02:23:08下载
- 积分：1
